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What voltage can I expect primitive PCB (2 copper layers, one on each side), to hold between one and another layer?

I assume removing copper at edges should make the edge path longer, so I am mostly interested in through-PCB breakdown.

I’m interested in 3-30 kV.

If this is not a good option, what options do I have to make a pcb-trace-transformer, that can hold a large voltage? In all configurations I can imagine traces are too close to be safe.

Update: im interested in a long term load, high frequency, not one peak. Dielectric strength of FR4 is 20MV/m, I can assume 20kV/mm. But dielectric breakdown says >50kV. 3MHz will be ok

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FR4 is often used for Rogowski coils for sensors in grid transformers and perform well with high voltage ratings. Degraded ratings depend on fabrication quality, and measling (voids) degradation stress from mechanical, thermal and moisture.

A more common FR4 dielectric breakdown spec is 20kV/mm , but this can easily be degraded lower or under pristine conditions increased as well. However surface breakdown or creapage is far worse due to contamination. Air with a smooth gap has a typical breakdown of 3kV/mm.

With Dk= 4.2 capacitance depends on the copper area/gap ratio that will affect HF impedance.

Tony Stewart EE75
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