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I recently looked into an interesting circuit designed by some other guys 6 years ago. The I2C SCL/SDA looks weird. The SDA is an open drain output but somehow it was designed this way, connected to a NMOS Source. (Same connection applies to SCL) I don't know why he didn't just simply pull high the SDA. However, it works fine. No field issue after all these years.

The Q1 can be turned on whenever the SDA is "LOW". When the SDA is not LOW, it's an open drain. The design makes the Q1 MOSFET source floating. It's not gonna turn off the Q1.

However, I measured the SDA_SMBUS and it's 3.3V when the SDA is not LOW. My thinking is that the MOSFET parasitic capacitance is doing the job. When one side of the Cds is open, the voltage of Cds's both side are the same. It makes MOSFET VGS less than the Threshold and the MOSFET is OFF.

Can anyone kindly comment on this? I just can't think of any other possibilities which makes the "wrong design" still works. Thank you so much.

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Zac Chien
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    This circuit is a bidirectional level shifter. The right side Vcc can be a higher voltage, like 5V. Forget about how you analyze most MOSFET circuits and read this: https://electronics.stackexchange.com/questions/173297/how-does-a-bidirectional-level-shifter-work – Mattman944 Jan 28 '22 at 08:48
  • The design in the answer lacks a pullup on the micro side – bobflux Jan 28 '22 at 09:31

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