Error message vsim-3171 keeps popping up in Modelsim DE 2021.1 even though it was solved in Modelsim ME 10.2c

Question

I have a test bench where I'm using a SystemVerilog bind construct. My test bench follows a similar organization to the one described at this link

Every time I run it, error vsim-3171 shows up. I came across a document that states that the issue was solved in Modelsim ME 10.2c (2013). I'm using Modelsim DE 2021.1 but the issue keeps popping up.

score 1 · Answer 1 · answered Jan 06 '22 at 19:11

1

The issue associated to vsim-3171 goes away after the work library is refreshed as shown below

vlog -work work_lib -refresh -force_refresh

answered Jan 06 '22 at 19:11

nanoeng

171
11

Error message vsim-3171 keeps popping up in Modelsim DE 2021.1 even though it was solved in Modelsim ME 10.2c

1 Answers1