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After seeing this schematic in this answer (from @VictorTito ... and others) in this post ...

I was curious to try it ... Added one resistor and I simulated this (?) (DC Analysis) ...

Meanwhile, by @G36 comment, I find @Jonk post ... Very good job!

Can someone confirm this "weird behavior" with another simulator?

enter image description here

I changed R4 -> between +12V and Q2 emitter as suggested by @G36. Same picture ...

enter image description here

Changed R5,

enter image description here

Or this ...

enter image description here

And this, after the change of R2 value.

enter image description here

Circuit from @VictorTito, DC Analysis ...

One remark : "internal impedance" = ~ -0.050 Ohm (?).

Simulated in three variables stepping (beta:+50, RT:*2, RB:*2)

enter image description here

enter image description here

enter image description here

Added also a simulation for the circuit cited in one link above. Note the "negative" internal impedance of this power supply.

enter image description here

And this if the switch is closed.

enter image description here

Null
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Antonio51
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  • A simplified version of this circuit? https://electronics.stackexchange.com/questions/299389/how-can-i-calculate-knee-current-for-this-foldback-current-limiter/299444#299444 electronic fuse with "latch" https://obrazki.elektroda.pl/6621038800_1368118663.gif – G36 Jan 03 '22 at 18:36
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    How could 12V ever deliver almost 500mA to R3? 12V/1K = 12mA... – rdtsc Jan 03 '22 at 18:37
  • @rdtsc R3 is used as a stepping variable. Value does not matter. – Antonio51 Jan 03 '22 at 18:39
  • @jonk Sorry. Did not know the post :-) – Antonio51 Jan 03 '22 at 18:42
  • This circuit is almost the same except the R_sens resistor (R4) is on the "wrong" side. – G36 Jan 03 '22 at 18:48
  • @G36 Ok. Between 12V and Q2 (emitter) ? Will try. – Antonio51 Jan 03 '22 at 18:51
  • Yep, between 12V and Q2 (emitter). – G36 Jan 03 '22 at 18:52
  • I add the new picture as "edit" which is the "same" as before (?) ... – Antonio51 Jan 03 '22 at 18:57
  • No, move only the left leg of a R5 resistor to Q2 emitter. – G36 Jan 03 '22 at 19:27
  • Antonio51, RT needs to be higher than RB. Much higher. Make it 1K. For the BC327, make RB 100R. Look at the spice code I provided for these values. Then you perform a dc analysis by changing the Rload from 100R to 10 in decrements of 1 like this: dc 100 10 -1. Then plot the current of v1#branch. – VictorTito Jan 04 '22 at 15:27
  • Antonio51, the transistors are running saturated like a switch, so beta is very small. If you check the BC327 datasheet you will see that beta is 10 for when VCE is saturated. Collector −Emitter Saturation Voltage (IC = −500 mA, IB = −50 mA) VCE(sat) − − −0.7 Vdc. – VictorTito Jan 04 '22 at 15:35
  • @rdtsc R3 is the load. For 500mA maximum it needs to be a little bit higher than (12V-0.7V)/0.5A otherwise the circuit will trigger. Please check the spice code and plot I have provided. It should be easy to understand. – VictorTito Jan 04 '22 at 15:38
  • Ths S1 is a microswitch D2 Green LED (OK), and D3 is RED LED (fuse blown) Vout = 0V. And to resist the fuse we need to press S1 switch. – G36 Jan 04 '22 at 16:52
  • I have edit my answer with additional information to help the understanding of the original circuit I posted. – VictorTito Jan 05 '22 at 16:04

2 Answers2

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Antonio51, Try this one: enter image description here

For the spice test try this one: enter image description here

You should get a plot like this: enter image description here

Please let me know if there are still any more questions.

PS: the circuit is a circuit breaker (like an electronic fuse) and not a constant current limit circuit.

Here are the result of my tests I posted in the original post: Circuit driving 400mA: enter image description here

LED shows that Q1 is ON: enter image description here

When circuit is off, it only draws 50mA which is the current in the Q2 collector and RB: enter image description here

Looking at my old electronic courses, I came up with the circuit below from my "neets-navy-electricity-eletronic-training-series", "Mod09 - Wave-Generation and Wave-Shapping Circuits", "Figure 3-11". Weird circuit don't you think? PS: I edit it for you folks to understand it better.

enter image description here

The circuit in "Figure 3-11" of the navy electronic training series presented above is a monostable multivibrator, where one of the transistors is saturated while the other is cut off.

Because the circuit is not symmetrical, when power is applied Q2 will saturate first, cutting Q1 off in the process. This is the stable state. When Q1 is off, its collector is at ground (no current flowing through R1). Q2 is saturated and its collector to emitter voltage (VCE) is very low and its collector is practically at +Vcc (in reality +VCC minus the drop of VCE), making the base of Q1 (through R3) also practically at +VCC, holding Q1 off.

If a positive (pulsed or not) voltage is applied to the base of Q2, it will cut Q2 off, lowering its collector from almost +VCC towards ground. In the process, the base of Q1 will become more negative, through R3, and Q1 will start to conduct, quickly saturating. The collector of Q1 will rapidly rise to almost +VCC. This sharp voltage increase is coupled through C1 to the base of Q2 causing it to cut off even further. This is the unstable state.

Once the positive voltage ceases to exist (if pulsed) or is removed (if not pulsed) Q2 starts to conduct through the network of R2 and C1, returning the circuit to its stable state in a time determined by the product of R2 and C1. Increasing/decreasing R2 or C1 will increase/decrease the time that the circuit stays in the unstable state.

It is important to note that a capacitor Capacitance is determined by the formula below, where K is the dielectric constant, A is the area (in square inches) of one of the capacitor plates and d (in inches) is the distance between the plates:

enter image description here
The interesting thing about the above formula is that if you decrease the distance between the plates the capacitance increases proportionally. If you decrease this distance towards the limit of zero, the capacitance will increase towards the limit of infinite, and the time constant will be infinite, resulting that the unstable state will stay until Q1 is cut off, or the power supply is removed and reconnected.

This is what is happening with the first circuit presented in this answer (the one with the Rsense resistor). The circuit is a modified monostable multivibrator, where the C1 capacitor have been shorted (theoretically making its capacitance infinite), RB is the equivalent resistor of R1 and R2 in parallel, R3 is resistor RT and R4 is the load resistance. Note: Q1 and Q2 are exchanged between the circuits (Q1 is Q2 and Q2 is Q1 in the second circuit diagram).

In summary, there are three types of current limit circuits that I know so far:

  1. Constant current limit circuit;
  2. Fold back current limit circuit; and
  3. Circuit breaker current limit. Or current limit circuit/breaker as the youtube video that presented this configuration is called. This is the first circuit in this answer and works with or without Rsense (Rsense makes the circuit more accurate and independent of the different parameters that two transistors of the same type may have. It also makes the circuit independent of the power supply, as with different power supplies you will have different currents flowing on the same resistor value RB.)

As I have mentioned in this answer, and in the original post (also the youtube video describes it better) the transistors need to be running saturated for the circuit to work and resistor RB needs to have a base current such that will keep its transistor saturated for the current the circuit is trying to limit.

For a load current of 500mA, and the BC327, the base current of RB needs to be at least as high as 50mA, as in saturation mode the transistor will be having a gain of as little as 10 (in saturation mode a transistor behaves almost as a fixed resistor and its beta gain have minimum effect as compared when the transistor is not in saturation mode.)

Resistor RT needs to be such that will keep the transistor saturated when it is conducting through RB (50mA for the load current of 500mA).

One more thing. When the transistor is saturated and the circuit on, it is the current flowing in the load that determines the current of the circuit and consequently the VCE voltage drop. Once that current is high enough to make VCE (+ Rsense if it is used) above 0.7 volts, the circuit will switch from “stable” to “unstable” state like in the “equivalent” multivibrator circuit.

EDIT: It is interesting that no one noticed my crazy statement that a short circuited capacitor would have an infinite capacitance. So, to avoid confusion, I am reviewing what happens with the circuit once it is in its initial stable state:

Q2 is saturated and Q1 is cut off, with C1 capacitor charged as in the diagram below: enter image description here

If a positive (pulsed or not) voltage is applied to the base of Q2, it will cut Q2 off, lowering its collector from almost +VCC towards ground. In the process, the base of Q1 will become more negative, through R3, and Q1 will start to conduct, quickly saturating. The collector of Q1 will rapidly rise to almost +VCC. This sharp voltage increase is coupled through C1 to the base of Q2 causing it to cut off even further. This is the unstable state.

enter image description here

Once the positive voltage ceases to exist (if pulsed) or is removed (if not pulsed) C1 starts to discharge through the network of C1, R2, and Q1, turning Q2 ON in the process, returning the circuit to its stable state in a time determined by the product of R2 and C1. Increasing/decreasing R2 or C1 will increase/decrease the time that the circuit stays in the unstable state. But what if the capacitor was not there? The +VCC of Q1 collector would stay there indefinitely, keeping Q1 ON and Q2 OFF.

enter image description here

If instead of a positive voltage applied to the base of Q2, it was the collector-emitter voltage (VCE) of Q2 to increase above a certain value (VCE > 0.7V), because the load current through R4 increased, the base of Q1 voltage would decrease, through R3, turning Q1 ON.

enter image description here

This is what is happening with the first circuit presented in this answer (the one with the Rsense resistor). The circuit is a modified monostable multivibrator, where the C1 capacitor have been replaced by a jumper, RB is the equivalent resistor of R1 and R2 in parallel, R3 is resistor RT and R4 is the load resistance. Note: Q1 and Q2 are exchanged between the circuits (Q1 is Q2 and Q2 is Q1 in the second circuit diagram).

enter image description here

VictorTito
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  • Placing only the sense resistor between Q2 BE, removing Q1's Vce from the sensed voltage, will make it much more well behaved - that's the canonical solution. – Unimportant Jan 03 '22 at 21:55
  • Canonical or not, it works. Check it out in the original question where I tested the first circuit without the Rsense. – VictorTito Jan 03 '22 at 22:38
  • Made the simulation in 3 cases of stepping (RT, RB, beta). I add in answer. – Antonio51 Jan 04 '22 at 07:48
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I can see about the same results in LTspice:

confirm

But it shouldn't be a wonder, because what you did was you stepped the value of the load -- that's the only way you could get 0.5 A at the output. On the breadboard this would have called the indians, and if you plot the currents then you'll see why:

test

Notice that I made R3 1 Ω, and even so the output current is not as close to 0.5 A as it is in your results (maybe because of different .models, the BC327 is from the default database, while the BC177 is from a 3rd party source). You can see the point where the foldback happens on Q2, but it's also where the BE of Q1 holds the entire show. The current through R1 and R5 confirm it. These results only happen for very low loads; for the 1k value that is shown in the picture, they don't. This is why your reply to rdtsc's comment is not valid.

a concerned citizen
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  • In fact, my R3 can be whatever value, because it is modified when the value of R3 (as a variable) is chosen in the "stepping tool" of microcap12 which calculates the DC value of all nodes and currents. However, I don't understand why I get angular "corners" in my "curves" ... and why they are "rounded" in your simulations? Will try with a PWL as input. – Antonio51 Jan 04 '22 at 09:55
  • @Antonio51 `R3` is the load, so if the transistors can't supply the current, they will get shorted out if the value is too low. It doesn't matter if it's `.STEP`ped, or not, the circuit can't supply that much current given the transistors (BC327 is 0.5 A). And the BC177 ends up supplying all the current through the BE junction (BE[Q1]->`R1`->load). In the picture the `.DC` is active, not the `.TRAN` (that's where I used the `PWL`, but the results come very close, save minor transients). – a concerned citizen Jan 04 '22 at 13:58
  • @aconcernedcitizen, BC327 can drive up to 800mA as per datasheet: Collector Current − Continuous IC −800 mAdc. Also, the transistor will be running saturated with VCE below 0.7V. The way the circuit works is that, as the collector current rises because the resistance of the load is reduced, the VCE + plus Rsense voltage drop increases. When it crosses the 0.7V mark, it makes Q2 conduct shutting off Q1. Q2 will in this case also run saturated with VCE below 0.7V so not to trigger Q1 on. The circuit works like a flip-flop circuit. – VictorTito Jan 04 '22 at 15:52
  • @aconcernedcitizen Ok. Will verify all voltages, currents, and powers. Too bad I no longer have my power electronics lab ... :-( I have also simulated this https://obrazki.elektroda.pl/6621038800_1368118663.gif . Something weird (internal impedance is "negative" ?), but it works as it would do (just max current is dependent of V input, tried for 12V, 18V, and 24V) – Antonio51 Jan 04 '22 at 16:13
  • @VictorTito Strange, LTspice lists it as 0.5 A, maybe it's a typo. Thank you for the elaborate explanation... – a concerned citizen Jan 04 '22 at 17:15
  • @Antonio51 Look at it this way: Q1 is meant to provide the foldback, but if that, too, saturates, then what's left is (from the source's side): Vce(Q1) + R2 (5k6) as one path, vs Vbe(Q1) + R1 + R3 (34R) as another (since Q2 will be bypassed by Q1, as intended). Which one do you think it will win? – a concerned citizen Jan 04 '22 at 17:19
  • I have edit my answer with additional information to help the understanding of the original circuit I posted. – VictorTito Jan 05 '22 at 16:03