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I am reading the book Digital Design and Computer Architecture. In this book, it describes logic levels that map of a continuous variable onto a discrete binary variable. and it introduces two gates called driver and receiver. The output of the driver is connected to the input of the receiver.

Here is what the book says:

The mapping of a continuous variable onto a discrete binary variable is done by defining logic levels, as shown in Figure 1. The first gate is called the driver and the second gate is called the receiver. The output of the driver is connected to the input of the receiver.

A real inverter changes more gradually between the extremes, as shown in Figure 2. When the input voltage V(A) is 0, the output voltage V(Y) = VDD. When V(A) = VDD, V(Y) = 0. However, the transition between these endpoints is smooth and may not be centered at exactly VDD/2. This raises the question of how to define the logic levels.A reasonable place to choose the logic levels is where the slope of the transfer characteristic dV(Y)/dV(A) is −1. These two points are called the unity gain points. Choosing logic levels at the unity gain points usually maximizes the noise margins. If VIL were reduced, VOH would only increase by a small amount. But if VIL were increased, VOH would drop precipitously.

My question is why we use NOT gate to build driver and receiver?

Is it aimed to amplify the signal? If it isn't, why not just connnect the output of a device to the input of the other device?

diver and receiver

behavior of these two gates

shino
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  • A very warm welcome to the site. This contains little detail to explain what you are asking. It's a Q&A site rather than a discussion forum. People will help you take the next step if your question shows you've already done as much as you possibly could - which yours doesn't, I'm afraid. Please edit your question and greatly improve it. Show your own work and own findings in considerable detail. The better the quality of your question, the better the quality of the answers it will attract. Again, welcome. – TonyM Dec 01 '21 at 12:53
  • okay, I will add more information. thx – shino Dec 01 '21 at 12:56
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    To help, specify, at least, at "what" cases this Question is related ... Distance between driver and receiver ... etc ... – Antonio51 Dec 01 '21 at 13:01
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    Thanks for the good effort to clarify. Please can edit further and add the actual text that makes this statement. Otherwise, it's wanting everyone to go and look it up somewhere in the book. – TonyM Dec 01 '21 at 13:09
  • As TonyM says you should quote the actual lines, paragraph from the text. Also as Antonio51 states, you should consider distance between driver and receiver, as in 10cm, 1m, 10m, etc. – StainlessSteelRat Dec 01 '21 at 13:22
  • thanks for your kind, TonyM. so it is really aimed to amplify the signal, right? The reason why not use buffer to amplify the signal is because cmos is an inverter and we need 2 cmos if we use buffer? – shino Dec 01 '21 at 13:25

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My question is why we use NOT gate to build driver and receiver?

To me it looks like the book uses inverters (NOT gates) in the example because they're the most basic logic cell.

Suppose we would use not an inverter but a buffer. In all CMOS logic technologies (and that is 99.99% of what is used today) a buffer is made by cascading two inverters:

enter image description here Source

Where Tr1 and Tr2 are an inverter and also Tr3 and Tr4, like this single inverter:

enter image description here Source

So if you would use buffers instead of NOT gates, you would need the double amount of inverters (4 instead of 2).

I think the point that the book wants to make is easier to explain using NOT gates as they're simpler.

Is it aimed to amplify the signal?

Yes and a buffer would also do that.

In the case that you want to avoid inverting the signal, you could also use buffers as the transmitter and the receiver.

Bimpelrekkie
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