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I'm surprised to see no Single-Board Computer including Raspberry PI has memory modules for allow for flexible amount of memory (e.g. this review). And I have not found such discussions via web search, for PI I've found only that post on PI site Improve RAM with a laptop's memory module:

No, not possible. The Pi does not have a memory socket of any description - memory is soldered to the board.

No comments why, no comments whether it is in plans. I understand form factor is not large and it is densely packed already, but as amount of DRAM is important to many (IMO), why none of producers make at least one model with a removable SO-DIMM module? Any particular technical challenges?

marcelm
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Martian2020
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  • Challenge is in marketing. Technical difficulty is a matter of individuals who touch that. – jay Nov 24 '21 at 05:22
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    Why does the reason has to be technical? It may purely be a business desicion on what to focus. But of course there can be technical challenges. For example customers complaining that their memory module does not work or that the board now costs too much and it has a memory socket that makes it larger and they don't need it. If you need more memory, chanses are you are expecting too much and should have bought something else to begin with, or the estimation how much memory was done wrong or not done at all before purchasing it. – Justme Nov 24 '21 at 05:22
  • One obvious technical challenge is that SODIMMs are DDR2/3/4, but no Raspberry Pi supports any of those memory types. – user1850479 Nov 24 '21 at 05:51
  • @user1850479, wiki says LPDDR is used. Doesn't processors supporting low power support SODIMMs? – Martian2020 Nov 24 '21 at 06:20
  • @Justme, " the board now costs too much" - is SODIMM slot a complex thing? If not a board would cost less, a customer may choose if 1GB or 32GB needed, a customer may use DRAM from old laptops. – Martian2020 Nov 24 '21 at 06:26
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    Why are you surprised? The RasPi is based on SOCs that are meant for set top boxes. The earlier versions had the ram as PoP (package on package) which meant the dram sat on top of the cpu. The 4 has a separate dram chip - this is why they can offer different memory sizes. As for sodimm, the chip might not designed to drive multiple drams on a sodimm nor that amount of memory. Also another socket adds unreliability to the system. The sdcard socket is bad enough! You need to stop applying what you think is rational technical logic - most of the decisions are cost driven. – Kartman Nov 24 '21 at 06:30
  • @Kartman, "another socket adds unreliability ". SODIMM are used in laptops which are movable, and AFAIK USB ports are very unreliable, my USB hard drive often looses connection to laptop, but I don't recall laptop loosing memory "connection". sdcard sockets are not very reliable that I agree. – Martian2020 Nov 24 '21 at 06:38
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    Most of these small ARM processors use LPDDR instead of DDR, so no SODIMM support. – user1850479 Nov 24 '21 at 06:44
  • Laptops and PCs are rather benign applications regarding vibration and physical robustness. Connectors are a mechanical device and add unreliability. They add ease of upgrade and cost but little else. Put a circuit board on a vibration table and see what happens. – Kartman Nov 24 '21 at 06:46
  • Fun fact: adding sockets with SODIMMs will make it not so **Single** Board Computer, as these are separate boards. – NStorm Nov 24 '21 at 06:50
  • @NStorm, semantics... that video review I linked mentioned some boards with M.2 slots for drives, those than were not SBC? – Martian2020 Nov 24 '21 at 06:53
  • @user1850479, interestingly https://en.wikipedia.org/wiki/LPDDR "On 9 November 2021, Samsung announced that the company has developed the industry's first LPDDR5x DRAM. Samsung’s implementation involves 16-gigabit (2GB) dies, on a 14 nm process node, with modules with up to 32 dies (64GB) in a single package.". I'm getting lost in terminology, can "module" mean same as "chip" here, not memory board with several chips? – Martian2020 Nov 24 '21 at 06:55
  • Yes, "module" and "chip" mean the same thing in this context, although module is probably the more correct term. – user1850479 Nov 24 '21 at 06:57
  • @user1850479, actually I did not read correctly. module consists of dies - ok. "module" dies are usually soldered and connected within motherboard, correct? The question: can be / is there "separate" modules of LPDDR like DDR with pins? – Martian2020 Nov 24 '21 at 07:12
  • I can't find freely downloadable datasheet for the BCM58711 nor a full schematic for the Pi 4. It may be that the processor does not support more than 8 G of DRAM. If that is the case, then it would make sense to offer an 8 G version of the board but maybe it also makes sense to not bother with any type of DIMM. This is just speculation. If the processor does support more than 8 G, then the question remains as to why. But I doubt anyone here will be able to answer definitively. – user57037 Nov 24 '21 at 08:05
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    You could probably socket LPDDR, but I have never seen that done. – user1850479 Nov 24 '21 at 08:28
  • @user1850479, thanks for help. You mentioned LPDDR in comment long ago but the answer saying about same was written later by another. I guess you are not after reputation? ;-) – Martian2020 Nov 24 '21 at 08:37
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    More area, more power, more cost. It beats the very fundamental features of an embedded system i.e., low cost, low power, compact in nature. – Mitu Raj Nov 24 '21 at 09:12
  • @Mitu, how much more power would separate module of DDR3 8GB consume compared to soldered LPDDR3 8GB? – Martian2020 Nov 24 '21 at 09:19
  • Off-chip DDR3 8GB will consume more of course. Exact metrics depend on the vendors. – Mitu Raj Nov 24 '21 at 09:27
  • @Mitu, some min max examples? (and comparing to soldered) – Martian2020 Nov 24 '21 at 20:29
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    https://www.powersystemsdesign.com/articles/performance-vs-power-in-off-chip-ddr-sdram/22/5893 – Mitu Raj Nov 24 '21 at 20:49
  • @Mitu, "to LPDDR3 SDRAM... DDR3L consumes ... approximately nine times more power in standby mode". That is useful, thank you. However I have not found in the artucle the answer to the difference of soldered to main board vs placed on a separate one. – Martian2020 Nov 25 '21 at 03:34
  • One of the other reasons is that talking to a DIMM requires more elaborate [leveling](https://daffy1108.wordpress.com/2010/09/02/understanding-ddr3-write-leveling-and-read-leveling/) support in the controller, because the length of traces is not as controllable. – Simon Richter Dec 29 '21 at 01:20
  • @Simon, isn't it standardized? i.e. can't it be available as some memory controller "package" for ARM based SoC, like ARM cores are? – Martian2020 Dec 29 '21 at 02:16
  • @Martian2020, the question is what leveling features are implemented: are the DQS groups 8 or 16 bits wide, or is that configurable, is leveling supported only for reads, or also for writes, etc. If you have control over what ICs are used, you can match that to the available features (e.g. if DQS groups are 16 bits wide, you'd use an x16 IC, and if write leveling is unavailable, you'd match DQS group length closer to A/C length for the IC). – Simon Richter Dec 29 '21 at 04:07
  • For a DIMM, it is undefined whether x8 or x16 ICs are used, and DQS groups are typically not matched against A/C, so a controller that needs to use DIMMs will need to be configurable to run byte pairs in x16 mode, and support write leveling. Then, some logic will need to read the EEPROM, and set up the controller (where fixed ICs would use fixed values). – Simon Richter Dec 29 '21 at 04:11

4 Answers4

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The Broadcom BCM58712 SoC chip used in the Raspberry Pi 4 supports up to 8G of DDR-4 2133/2400 memory, so probably the issue is a lack of perceived market.

Spehro Pefhany
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  • Going to the link you posted, I was able to find "72-bit wide DDR3/3L/4 memory controller with error correction coding (ECC) (64b data, 8b ECC) up to DDR4-2400" and no mentioning of 8GB limit. 64-bits AFAIK support magnitudes more RAM than 8GB – Martian2020 Nov 24 '21 at 06:32
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    Doesn't the Pi 4 use the BCM2711? – user1850479 Nov 24 '21 at 06:40
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    Martian, the address and data busses for DDR are separate from each other. The address bus is not 64 bits. If you reflect upon it a little bit you will see that 64 bits of address is preposterous. Also, the way DRAM addressing works is kind of convoluted. There are row addresses and column addresses and also bank addresses. The memory controller is responsible for translating memory access into appropriate signaling on the DDR bus to specify the address and read or write the data. – user57037 Nov 24 '21 at 08:13
  • @mkeith, I recall asking another related question and in answer or comments reading that memory is not DRAM only, that 64 bits are also for "hard drives", etc. Is it correct BTW? I mentioned bits because I wanted to imply that in specs nothing prevents more than 8GB addressing. – Martian2020 Nov 24 '21 at 08:22
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    Well, the DRAM memory will be accessed by a DRAM memory interface. That interface will not access any other memory type. It is very specialized. There will be a separate interface for other memory types (for example SDIO or something similar for SD cards). I am speaking in very general terms here. Not familiar with which interfaces are actually on the BCM7811. Here is more about DDR4: https://www.systemverilog.io/ddr4-basics – user57037 Nov 24 '21 at 08:27
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Largest technical challenge is the lack of infrastructure.

Many SoCs support only LPDDR memories and do not support standard DDR memories, so there are no existing sockets or memory modules you could use to add memory.

Justme
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It depends what your definition of "SBC" is. There are plenty of embedded systems that have socketed RAM. Different SoCs will support different RAM types. In the case of the RasPi, as has been pointed out in the comments, the SoC is a consumer chip and hence it would be far more cost effective to have soldered RAM on the same board (not to mention the actual PHYs). This is a commercial choice which is as, or more even more important than, "technical" choices, when you're building millions of units.

An example of an "SBC" supporting DDR4 SODIMMs from Solid Run. Does this meet your criteria?

enter image description here

awjlogan
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  • It is offered for $500 compared to PI of $50. I'm surprised middle range if empty. What is the cheapest SoC supporting DDR4 (DDR3)? How more expensive is it compared to SoC used in PI? – Martian2020 Nov 24 '21 at 20:22
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    @Martian2020 - I don't have that info to hand, a lot depends on volume and there are many, many SoCs out there! Problem for non-x86 boards is there is little _consumer_ demand for a general purpose computer that doesn't run Windows; the general public does not (knowingly) run Linux. $500 is nothing for an industrial grade system. The secret to RasPi's success is combining the cost/volume of a consumer SoC with fantastic software support. – awjlogan Nov 24 '21 at 20:54
  • IMO significant % of consumers run MacOS, new M1 ARM devices are user friendly (AFAIK same as were x86 ones, though not used M1 myself). Is it much difficult to re-build e.g. Ubuntu for ARM based board? – Martian2020 Nov 25 '21 at 03:01
  • @Martian2020 - sure, I'm using an M1, it's superb. Apple don't make their SoCs available though, and also they've invested massively in their software story. It's very easy to install Linux on Arm (RasPi's OS is derived from Debian), and almost all embedded systems use Linux underneath. The problem is that there isn't enough demand for a general purpose computing SoC at the moment - it's mostly consumer or industrial embedded systems. – awjlogan Nov 25 '21 at 07:34
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The following provides related info:

Apacer Launches 32-Bit SODIMM for Arm & RISC-V Systems:

Apacer has announced a lineup of 32-bit SO-DIMMs designed for systems based on processors featuring Arm, RISC, or RISC-V architectures. The memory modules will enable SoC developers to take advantage of capacity and performance flexibility offered by modular memory solutions.

Memory organization is a bit different between x86 and Arm/RISC-V based systems. The former typically feature one or more 64-bit memory interfaces to connect one or more 64-bit memory modules (or just a set of DRAM chips) in a bid to maximize raw memory bandwidth and capacity. By contrast, Arm or RISC-V powered SoCs use one or more 16-bit memory interfaces for granularity, power, and efficiency (to maximize channel utilization and effective memory bandwidth) reasons. Since the vast majority of Arm or RISC-V based systems are either mobile or special purpose, most of the memory subsystems are custom-designed with only a handful of SoCs featuring “wide” memory interfaces. As a result, most of them cannot use industry-standard 64-bit DIMMs and rely on soldered down memory.

Martian2020
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