I need to know how the values of the components are calculated and worked well in simulation.
Let's work backwards. The voltage that appears on the collector of Q1 should look something like this. (ignore the time-scale, this is taken from another Q/A).
This signal consists of two components. An AM signal plus an amplified version of the modulating signal.
If your collector voltage looks like that, you can get the AM signal by filtering away, or attenuating the component which is the amplified version of the modulating signal. This is (imperfectly) accomplished by the RC high pass filter consisting of RL and the output capacitor. By selecting RL and Cout values such that the cutoff frequency of the RC high pass filter is around that of the carrier frequency.
Use the formula:
$$f = \frac{1}{2\pi RC}$$
where f is the cutoff frequency.
If you pick the cutoff frequency to be equal to the carrier frequency, then you can calculate what Rload * Cout needs to be.
To get the collector voltage to look like that in the diagram, one needs
- The gain of the transistor to be set properly
- The biasing of the transistor to be set properly
- The emitter voltage to reflect the modulating signal, but much less so the carrier signal.
The last point is (imperfectly) accomplished by the low pass filter formed by the combination of Re and Ce.
Choose values for Re and Ce so that the cutoff frequency is the same as the modulating frequency.
Again, use the formula
$$f = \frac{1}{2\pi RC}$$
The emitter voltage should look something like this:
If too much carrier frequency signal appears on the emitter, the voltage on the collector may look something like this:
\$\uparrow\$ NOT WHAT YOU WANT AT COLLECTOR! \$\uparrow\$
Again, working backward, one needs to fix the gain so that the transistor neither goes into saturation nor cutoff. Either of these situations will greatly distort your AM signal. Run a simulation of the circuit with the collector being monitored. You need to adjust the gain and bias of the circuit so that the voltage swing is something like from 0.7V to Vcc-0.3V. If you go too close to ground the transistor is in saturation, and if you go too close to cutoff. You can modify the gain in a few different ways. Increasing Re will decrease the gain. Increasing Rc will increase the gain.
As you adjust the gain, you may discover that bias also needs to be adjusted. That is, if the transistor goes near Vcc-0.3V, but doesn't go anywhere near 0.7V. Or alternatively, if the transistor goes near 0.7V, but doesn't go anywhere near Vcc-0.3V. You can adjust the bias by changing the values of R1 or R2.
I can’t understand why the Em is greater than Ec
Both Em (Vmodulation) and Ec (Vcarrier) get amplified. However, from the image above showing the collector voltages, it should be clear that the smallest amplitude of the AM envelope occurs when the top of the amplified carrier gets close to Vcc. The smaller the carrier frequency peak-to-peak voltage at this point, the closer one can get to 100% AM modulation without clipping. Hence the reason for keeping the carrier voltage small. A larger Vcarrier means that the % of AM modulation must be less.
