1

I would like to avoid using DC-DC converters for each power MOSFET in a switch-mode power supply as they are pricey, bulky, and have an input to output capacitance which can lead to common-mode noise generation.

The schematic I have in mind is the following:

enter image description here

As the MOSFFET source will go high from time to time there will be enough energy to charge the capacitor which will power up the gate driver.

The MOSFETs are SiC if it is an important circumstance.

My questions are:

  1. Is there anything I should be aware of in case of using this method of making power for a gate driver?
  2. Is there a better schematic for this?

UPDATE: I have put 1M resistor in parallel with the capacitor and lowered the gate resistor to make the Zener current higher as Michael suggested.

enter image description here

ocrdu
  • 8,705
  • 21
  • 30
  • 42
Roman Matveev
  • 2,942
  • 7
  • 32
  • 75
  • 1
    so this is a usual ~10V linear regulator. it will have a terrible efficiency especially at high supply voltages of 100s V. But it will work :) *if* the drain of the Power FET always stays high enough, which is questionable in low-side drive application. I.e. it cannot keep the Power FET on indefinitely. – tobalt Nov 13 '21 at 07:28
  • Component values and data sheet links please. Operating frequencies and duty cycle range please. Load currents and power supply voltages please. DC/DC converters I use for driving SiC MOSFETs only have 3 pF capacitance and tens of kV per microsecond rejection so, please also link the converter you were thinking about. – Andy aka Nov 13 '21 at 10:01
  • Hello, @Andyaka! What is the DC-DC type you are mentioned? 3 pF looks too low to be true. I already use B1212LS-1WR2 by Mornsun which has 20 pF capacitance and this was much lower than others, like Traco, Meanwell and so on. – Roman Matveev Nov 13 '21 at 11:33
  • 1
    https://recom-power.com/pdf/Econoline/RxxP2xxyy.pdf - I measured plenty of them and they were all as per what was written on the tin. – Andy aka Nov 13 '21 at 11:35
  • DC-DC converters aren't that expensive, nor is the isolation capacitance that large if they're well designed (unless you're doing an application that needs sub-pF isolation capacitance, which is very uncommon). A linear regulator like the one you've made here is not a very good idea. – Hearth Nov 13 '21 at 18:45
  • @tobalt _"I.e. it cannot keep the Power FET on indefinitely."_ - one would hope this never happens in a switch-mode power supply :) – Bruce Abbott Nov 13 '21 at 20:33
  • I don't think it's going to work. What rules here is the average current through the 220k resistor, which is virtually proportional to the average Vds. Now this voltage is going to vary with duty cycle from nearly zero to Vcc bus and it will hence be a nightmare to find a tradeoff between minimum current, maximum one, wasted power... I'd try the classical bootstrap which relies on peak Vds voltage instead ;) – carloc Nov 13 '21 at 22:24

2 Answers2

2

This won't actually work. When the main FET (the one driven via 10 Ω) turns on, the supply voltage will fall to near 0. The regulator FET driving the capacitor) had a parasitic diode from source to drain, and this will discharge the 1 uF -- thus removing the optocoupler's supply.

You need to add a diode (e.g. 1N914, or 1N4148) in series with that FET's drain to prevent this.

jp314
  • 18,395
  • 17
  • 46
1

It's working, but:

I don't see a reason to amplify a zener voltage with mosfet, just place enough capacitor across zener to cover initial draw of gate charging.

You didn't mention the Vcc, 470k is suitable for high voltage, make sure you supply zener with 1mA at least.

If you insist on zener amplification, put some high impedance across cap. The follower doesn't like an unloaded capacity in source.

Edit:

Circuit like this will have much better efficiency. It's a raw design, try simulate and pick the right components, especially C1 - it determines how much charge is added to C2 every positive period, so if it's too much it will be waisted on R2,D3.

enter image description here

  • 470K was made up out of whole cloth. I should make some calculations to do it better. Regarding your idea to keep only the zener: it will take current anyway - even when the power from the capacitor is not needed. So I think it will just warm up the zener for no reason. I like the schematic with MOSFET more. – Roman Matveev Nov 13 '21 at 07:59
  • 1
    I would say it depends on switching frequency. Gate drains almost nothing but it becomes a load if you charge it too often. –  Nov 13 '21 at 08:17
  • The switching frequency is 40 kHz and the total gate charge is 200 nQ which leads to 8 mA of average current. MOSFET will dissipate about 1.6 W of power. I don't really like it :( Is there any better solution? Maybe any IC? – Roman Matveev Nov 13 '21 at 08:22
  • Define the Vcc. Also if you care about low power draw. Battery application, mains? –  Nov 13 '21 at 08:25
  • Do you mean gate driver supply voltage by saying "Vcc"? I'd like to have 20 volts or so. This SMPS uses mains voltage (220 VAC) and battery voltage as well (200 VDC) – Roman Matveev Nov 13 '21 at 11:37
  • Ok, there are many options how to get voltage for switching gates. Auxiliary winding on tranformer, voltage from low voltage side, capacitor pump. Use zener for inial start-up then disconnect the zener leg. If you doesn't care about losses use zener or your proposal for all run. –  Nov 13 '21 at 12:24
  • @RomanMatveev If you're trying to do this off of 200 volts, your first MOSFET (the one with the zener on its gate) is going to fry instantly. – Hearth Nov 13 '21 at 18:47