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I've recently found out (correct me if I'm wrong here), that 5nm lithograthy machines are made by ASML, which is independent and Intel invested in it. I've tried web searches but I still do not understand why Intel, for many years, "struggles" to go from 14nm to lower scales? I've found recent articles that claim "TSMC is to start making Intel's Core i3 on its 5nm process in 2H21 ". Why doesn't Intel just buy 5nm lithography from ASML and start to produce? I suspect processors' production need much more than wafer lithography, but do not want to make uninformed guesses as to the main reason behind Intel "problems".

I've read How are other chipmakers keeping up with TSMC if their processes are just the best? but have not seen answer to my question.

Shashank V M
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Martian2020
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    One possible reason is that machines don't run themselves and knowing how to use a tool is at least as important as the tool itself. They have much configuring, many degrees of freedom, many settings, and require proper set up and tuning. Just because you are given a tool capable of performing some feat doesn't necessarily mean you know how to get it to perform that feat. You could have the most accurate grinder, lathe, or mill in the world and not know how to use it well enough to produce parts even remotely close to what it is capable of. – DKNguyen Nov 05 '21 at 03:50
  • I've worked in FABs as I specialize in non-contact, in-situ temperature measurements of wafers. There are so many complexities. Those solved better now, but less so when I was more active, were achieving Auger level vacuums of 10^-10 or better, which is about XHV levels found in geostationary orbit. It was hard. But with modern tiny features, lithography is almost ***insane***. The mask features look almost *nothing* like the features you target on the wafer and software is required to figure out the differences. Optics are a whole other problem, too. CMP yet another. In short, a rat's nest. – jonk Nov 05 '21 at 04:54
  • @jonk, ok, but Intel does its 14nm processors, I guess they have software, the task is "just" to scale it fro 14nm to 5nm. Vacuum levels I understand need to be "better" and that might be part of the problem for Intel. – Martian2020 Nov 05 '21 at 06:55
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    *I guess they have software, the task is "just" to scale it fro 14nm to 5nm.* The software is absolutely **NOT** the issue. What is the issue is as jonk hinted at: the complete production line. Such a new line needs to be developed and that takes time, money (lots of it) and effort. The "recipe" for making such ICs needs to be developed. And that's a complex recipe and also company secret. Intel didn't start this development when TSMC did so now Intel is lagging behind and is forced to have some chips made at TSMC (Intel does not like that). – Bimpelrekkie Nov 05 '21 at 07:29

2 Answers2

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First of all ASML cannot deliver unlimited devices and everybody wants them. I am sure Intel do use ASML for their EUV processes.

You can't compare the process trade names '14nm' and '7nm' literally. They are closer than it appears (both being way larger than you think).

Lastly, if just buying a shipping container from ASML would allow you to create 5nm structures on a 300mm wafer, then there would be many more manufacturers. Tons of other things have to be optimized: resists, etching, which materials to use for traces at which level, how to get the material to where you want at the right quality and so on.

Shashank V M
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tobalt
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Considering the breakdown voltages of 5 nm using a typical very clean BDV of 50kV/mm or 50 mV/nm it is extremely difficult to prevent discharge to passivate with electric fields the lithography of 5 nm with high yields and high field intensity.

Nobody can control the low contaminant levels in a clean room or the lithography as well as TSMC which is why Intel uses them to produce CPUs. We're talking not about HDDD HDA clean rooms of class 100 but more like Class 0.1 I would expect.

Tony Stewart EE75
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