0

Currently, in my design, there are some high voltage traces (750v 30A DC) and low voltage ones (5v, 3.3v). I've already ensured the high volt trace far away from the low volt trace (>4mm) to meet the clearance and creepage requirements when they are in the same layer.

However, I'm not sure what's the requirements for these traces on different layers. For example, can the high voltage trace on the top layer overlap the low voltage trace on the bottom layer? Another example is that can I put the ground plane layer under the layer where high voltage trace runs?

From my point of view, this may be not safe as the vertical clearance between the high volt and low volt parts is quite small (PCB thickness is 1.6mm). However, I haven't found any rule or regulation that define the clearance requirements for the high volt and low volt trace in different layers. Does anyone know the clearance requirement in this case?

feetwet
  • 2,322
  • 9
  • 31
  • 55
Ross
  • 542
  • 5
  • 21
  • other limits are applicable for distances through FR4 than through air, because the material cant contaminate internally and is less affected by humidity. By the same logic, HV transformers are potted to reduce necessary dimensions. Unfortunately, I have no numbers on my hand, but I suppose that top-to-second-layer distance is definitely too short and top-to-bottom-layer distance is probably close to what is necessary at 750 V. numbers here: https://electronics.stackexchange.com/questions/66789/mains-to-low-voltage-seperation-between-fr4-pcb-layers?rq=1 – tobalt Sep 29 '21 at 07:11
  • Clearance refers to through air which has low breakdown strength, creepage refers to along a surface which can become contaminated. For through FR4, you'd use the dielectric strength figures for FR4, together with the expected a few kV transient overvoltages you have to design for. – Neil_UK Sep 29 '21 at 08:37
  • 2
    Does this answer your question? [Mains to low voltage seperation between FR4 PCB layers](https://electronics.stackexchange.com/questions/66789/mains-to-low-voltage-seperation-between-fr4-pcb-layers) – Elliot Alderson Sep 29 '21 at 15:14

0 Answers0