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I was reading about this source follower and wondered how the bipolar transistor makes Vgs somewhat stable. I believe that what happens here is that when Vin is high more current flows through the base of the bipolar and then more voltage drops across R2 and Vgs stays stable. But it is was too vague for me so I tried to prove mathematically that Vgs is stable, I started as seen in the calculation below but it got me nowhere.

Here's a simulation of this circuit Improved source follower

The pro coder not really xd
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  • Use a freely available (and free) simulation package. Proving Vgs is stable is somewhat meaningless in the context of your question. – Andy aka Jul 20 '21 at 18:32
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    Kudos for trying to figure this out on your own; the world needs more original thinkers. I suggest trying [LTspice](https://www.analog.com/en/design-center/design-tools-and-calculators/ltspice-simulator.html) (it will run on Linux under Wine); remember Vss is below 0V so you'll have to bias the FET (input voltage) properly. – rdtsc Jul 20 '21 at 18:57
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    Your first line, on the right, has the equation you should just solve for \$V_{_\text{GS}}\$. That result only depends upon model parameters for the JFET (notoriously variable) and the drain current, which in these circuits is set by a self-adjusting current sink of some kind. I think that's all the article is suggesting about this. As to your question, are you only asking about how it is that the BJT circuit itself functions within this circuit? (And ***not*** asking about the right-hand side double-JFET case?) – jonk Jul 20 '21 at 19:52

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The base current of the NPN is approximately VOUT/R2/beta. R1 is chosen so that VBE/R2 is >> that base current. Note that this value is nearly constant as VBE only changes slightly when the transistor's current changes.

The current in the JFET is the sum of these currents, but since the R1 current is much greater than the base current, the JFET's current is also quite constant. Therefore the VGS of the JFET is constant, and ultimately VOUT follows VIN with an offset of the JFET VGS and the NPN VBE.

This (as much of electronics is) is an approximation. In practice, you might have a gain of about 0.9 instead of 1.000.

Calculating more precisely isn't really worthwhile because device-device variations, temperature variations (and non-idealities) will swamp the other errors. However the way to proceed is:

From VOUT, calculate IE of the NPN = VOUT/R2. The base current is this /(1+b) == VOUT/(R2(1+b)). The VBE of the NPN depends on the log10 of the current -- VBE = 26mV*log10(IE/I0), where I0 is a parameter of the NPN.

Now calculate R1's current (= VBE/R1). Add this to the base current giving the JFET's source current. Use the JFET square-law equations to calculate the JFET's VGS.

jp314
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  • Thank you for explaining this, sounds like the NPN is used by R1 as a voltage regulator. The only thing I did not understand/agree is that Ib=VOUT/R2. it isn't true. – The pro coder not really xd Jul 21 '21 at 17:26
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    Fixed that. IB = VOUT/R2/beta. (in fact it's beta+1, but we are approximating and simplifying here). – jp314 Jul 21 '21 at 20:17
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    No, the NPN is an emitter follower and is used to lower the output impedance of the circuit (provide more drive current). The biasing (R1) is chosen to give the JFET approximately a constant load. – jp314 Jul 21 '21 at 20:18