Sure, but unlike making a PCB this is not a simple thing to do.
First, you don't simply send over your HDL. Fabs require geometry, in GDS format. So that means you have to convert your HDL using some sort of HDL to GDS flow. Not only that, you need to conform to the fab process design rules. You'll most likely want to use standard cell logic, and for this you'll need to get your hands on a process development kit (PDK) that's compatible with the process. But that's just for the logic gates, you'll also likely need to get RAM IP (usually in the form of a RAM generator), PLLs, IO components, etc. Depending on the process, licensing all of this can be expensive. And you'll also have to wire up all of the clock and power connections as well. And you'll want to simulate as much as possible to try to prevent mistakes, and add extra debug logic such as internal JTAG chains so you can test the design. And you'll have to get it packaged, including doing things like placing bond pads on the die that get connected to the package pins.