Can PCB test points be a source of noise?

Question

If I want to design a PCB with as much noise immunity as possible, should I leave off test points?

I'm concerned that TP4 and TP5 may be acting as antennas and picking up noise.

Answer 1

Yes, test points can function like antennas, they can function like little antennas (and this is the reason why DRC in PCB tools sometimes check for small bits of copper that go nowhere and function like antennas)

This means they can radiate as well as pick up noise. But it really depends on the frequencies involved, and the PCB construction. (I'm thinking that antenna effects would be something to worry about 50Mhz+ due to the size of the traces and the physical parameters) anything sub MHz, it probably wouldn't be that big of a concern.

It is generally a good idea to leave test points off of analog inputs before pre-amplifiers (in sub uV designs the analog signals are so small that a meter would interfere with the signals anyway by also picking up noise). After the pre-amp is a good place for a test point if you need to check voltages.

Also in the design above, it looks like there is an EMI filter to the test points, so it may not make that much of a difference to have the test points.

Answer 2

The short antenna efficiency is proportional to the ratio of the rise time/propagation time and the length of any cable attached to a connector.

• It is reduced by shielding and by balanced differential pairs. Unbalanced pairs can still radiate with the common-mode signal.

• At 0.2 ps/mm prop delay with 5mm you will get a 1ps delay on a rise time of what 10ns? That is almost 4 orders of magnitude attenuation in far E-field over a very small near-field range.

• To reduce crosstalk you add gnd. guard tracks or a copper pour.

• For H fields you would need a load current.

• Any interconnecting unbalanced cables with radiate far more than and test points .

• of greater concern is the signal integrity of the test point without a ground reference for a spring probe via nearby ~ 6mm away.

For stripline and prop delay reference, this might be of use. It's a great proto shop with lots of reading material. https://www.protoexpress.com/blog/signal-propagation-delay-pcb/

• since you did not define any parameters I can only offer a few generalities.

Answer 3

I see a 2 pin header for an unshielded cable. These wires will make much better antennas than the trace stub to the test points.

There is what looks like a differential LC filter on the PCB next to it, and the inductors look pretty chunky, so I assume this is not a highspeed signal line.

So for noise immunity, I think you should focus on stuff like:

• what kind of signal you have in these 2 wires (two signals, or differential)

• is it a sensitive signal that needs shielding? or not?... or something like a power supply that doesn't really care

• put some thought in the LC filter design, look a the self resonance frequency of the inductor, would a ferrite bead be better?

• If it's a differential signal, would a common mode choke be useful? These also have leakage inductance, so for example if you replace your 2 inductors with a CM choke you can save a part and have both common mode and differential mode filtering...

• Also your filter caps will have less inductance if you replace the skinny trace to the ground via with a wider track. You can also use several vias.

• Whether these are 2 signals or a differential pair, where does the common mode / return current flow?

• The filter caps dump the noise from the cable into GND at their via, making this bit of GND something more like "chassis ground". This current will return somehow to close the loop, through the ground plane. What is its path? It should not go through the GND of a sensitive analog circuit. That's why it is usually safer to put all the connectors on the same edge with their filter caps there, so the mess of common mode noise current is contained in that part of the ground plane.

Answer 4

Yes, test points can absolutely be noise sources if the test-pointed node is high-impedance. For high-frequency signals they also can be a source of distortion due to the discontinuity they introduce.

First issue, the antenna.

As you've drawn them, the test points form small antennas. This makes them prone to picking up RF noise from within and outside your system.

• For digital, any test point with an impedance above 10k (like internal pull-up/down on logic ICs) can be vulnerable to RF pickup.
• For Analog, sensitivity depends on the circuit impedance and the required signal/noise ratio.

In both cases, if the test-pointed node is low impedance and high-frequency signal integrity isn’t a concern then the test points won't be such an issue. (I’ll get into the SI issue below.)

How does this issue come up? Any RF source near your system (like a cell phone) could be an 'aggressor source' of RF that can upset its operation. For example, remember PC speakers that would 'chatter' whenever a cell phone was nearby? That's external RF interference.

Part of product qualification is one particularly nasty test: EMC susceptibility. This test is designed to suss out the target system's vulnerability to an aggressor RF signal. The test setup directs high-power RF at the target over a wide band of frequencies.

During the susceptibility test, those antennas formed by test points will get bathed in this powerful RF signal, and if the test-pointed node is vulnerable (high impedance and/or sensitive), that RF will get into your circuit causing it to malfunction, like those cheap-ass PC speakers.

If you absolutely need the antenna-style TP's, and if your circuit allows it, you can mitigate the effects of noise pickup by adding capacitance to ground at the test point. This will shunt aggressor RF energy to ground. This technique is useful for static signals like logic strap options or audio-frequency analog. It's not necessarily a good choice for any critical signal.

Now, for the second issue (and buried lede): impedance discontinuity. Test points like you’ve shown introduce a signal stub. Stubs cause reflections which will mess up a high-frequency signal, be it digital or analog. This will distort a high-speed signal, possibly causing your system to malfunction or at least not perform as well.

If you still absolutely need the test point, reduce its effect by repositioning it so that it’s directly on the trace with no stub. This also fixes the antenna problem by, well, eliminating the antenna.

Answer 5

Frame challenge: Why are they there in the first place?

The purpose of test points is for easy access to signals you would not otherwise be able to reach.

In this case your signals are on a through-hole pin header. You can already:

• Hold a probe on the pads on the underside of the board.
• Temporarily solder flying wires to the pads on the underside of the board.
• Place probes onto the header pins, if it is not connected.
• If connected, don't push the connector on as far, and clip probes onto the exposed pins.
• If connected, use another header as an "extender" and cut away some plastic on that so that you can clip probes onto the exposed "extender" pins.
• If connected, use a needle probe or cut away insulation to access the signal after the connector.
• If connected, look at the signals at wherever they come out on the other end of the wire.

If this is a high-bandwidth signal, perhaps these options aren't good enough. In that case though, nor is a basic clip-on test point good enough. At a minimum you'd need a 0V immediately adjacent, and the PCB should have a balancing 0V track underneath; and more than likely the test point should actually then be a coax connector. And at that point we need to question the suitability of J1 for purpose, so your design would have deeper problems than just the test points.

In short, you have no reason for these test points existing anyway, so delete them.