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A friend asked me a question (we are both quite new to electronic circuitry and logic, though varying degrees of tinkering and comp. sci. education).

The question is, why would a buffer have an inverter on both ends of the I/O? An example image would be:

diagram

Thanks! This is interesting.

SamGibson
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bccarlso
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  • It acts as a time delay. Digital version of an allpass filter which doesn't change the magnitude of any frequency but changes the phase response. – Shredder Jun 21 '21 at 19:10
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    @Shredder: But a non-inverting buffer does that too. – Ben Voigt Jun 21 '21 at 19:13
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    It also is an logical but analog impedance buffer from xx Mohms to Ohms depending on logic voltage family. E.g 74HCxx = 50 ohms +/- 25%@ 5V, basically two inverters – Tony Stewart EE75 Jun 21 '21 at 19:13
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    Related: https://electronics.stackexchange.com/questions/267019/why-is-there-a-double-inverting-buffer-instead-of-a-single-non-inverting-buffer – Eugene Sh. Jun 21 '21 at 19:15

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It also is an logical but analog impedance buffer and complementary switch from xx Mohms to Ohms depending on logic voltage family.

E.g 74HCxx = 50 ohms +/- 25%@ 5V, basically two inverters in series

Tony Stewart EE75
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A non-inverting buffer cannot be done directly, as the smallest building block you can make is an inverter, and two inverters make a buffer.

Two inverters in a row means it adds more delay, but it also has a higher output drive capability. Internally, it could have any even amount of inverters connected together to make a buffer with required drive ability, as each stage can roughly amplify the drive ability by about 4x.

Sometimes you see the inverting notation on logic gate inputs and outputs, it might simply mean that this is a buffer for an active-low signal, and both the input and output inverting notation is there to emphasize that.

Justme
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I would assume that the inverter circles on the input and output of the buffer indicate that the signals involved are "active Low".

Peter Bennett
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