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I want to switch upto 36V and higher onto a piezo disc. Wideth of the pulse I want to apply is 250 nano-secs.(4 MHz - piezo resonant frequency )

I summarise the problems I face here.

I apply the pulse using monostable multi-vibrator,74hct221d and ne555 and passing it through 74hct14d.(These are not seen in the simulation.) I plan to use psmn041-80yl mosfet to switch as it can accept a 5V gate supply.

74hct14d can at the maximum supply upto 20mA load which is not adequate for the mosfet gate which needs in the least a few 100mA to switch in nano-secs. I tried using a fast transistor mmbt4403 for supplying increased current to mosfet gate. It is switching, it introduces a long turn-off delay, as it has a high storage time of 225 nano-secs. So, in spice simulation, I could not get better than 1.2 us switching time using 250 ns trigger signal. (This switching time is at the gate of the mosfet - see draft2 circuit and draft2-output).

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Using a NMOS to switch at 5V logic and PMOS to switch at 36V power, I get result like draft1.png. Even in this case, it must be mentioned that the gate current spice simulation shows a couple of hundred mA, which cannot be supplied by 74hc14d.

enter image description here

If I directly apply 250ns pulse to the gate (for proof-of-concept - see draft3 circuit and draft3-output) in spice-simulation, I get about 300 ns switching time on mosfet which is manageable.But this cannot be done due to 74hc14d output current limitation.

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And I cannot supply enough power to mosfet gate using a 5V logic, so cannot switch it without enhancing gate-current. Enhancing gate current with transistor or signal-mosfet introduces unacceptable delay. What options I have ?

I have seen related questions and answers and my simulations already try them out. I need help which addresses nano-secs switching. Thanks in advance.

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    You should have a look at "gate driver" circuits. Many are simply a CMOS inverter. A proper gate driver can push and pull a large current. In your first circuit the "push current" is limited by the 1k resistor. Also how you use the PNP to pull the gate down is weird. In Google search for "gate driver circuit" and then press the images tab to see some designs. If you need to make this on a PCB, consider using a **gate driver IC**. – Bimpelrekkie May 07 '21 at 07:20
  • You might also want a push-pull stage for the piezo. Right now, the MOSFET can only charge the piezo, but but not discharge it. – polwel May 07 '21 at 07:36
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    ¿sᴉɥʇ ǝʞᴉl noʎ op ʍoH – a concerned citizen May 07 '21 at 07:57
  • @Bimpelrekkie, You are right.I have considered a good many gate-driver ICs. They introduce significant ON-resistance, like, IX4427 for 36V VCC which introduces 12 Ohm. This limits current to piezo-disc as well as not allow max-power-transfer. Calculating from BVD model of piezo-discs, I estimate a current of about 7A. – Ever-a-Student May 07 '21 at 08:09
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    @Bimpelrekkie, "Also how you use the PNP to pull the gate down is weird."(draft3.asc) This is taken actually from a TI converter implementation and works well. In this circuit, my only issue is that actual signal-generator 74hct221 cannot give the current the simulation power-supply is giving,which is about 400 mA. Draft3 circuit is just proof-of-concept and works if only same current could be sourced from 74hct221d IC. – Ever-a-Student May 07 '21 at 08:20
  • @polwel, "Right now, the MOSFET can only charge the piezo, but not discharge it"- hmmm. I think the mechanical reaction of piezo is to discharge applied charge. I welcome if you can explain if it is otherwise. – Ever-a-Student May 07 '21 at 08:25
  • @Bimpelrekkie, "In your first circuit the "push current" is limited by the 1k resistor", I have tried the resistance R3 values from 10 Ohm - 1000 Ohm. Gate is parallel to it,so it should not affect push-current, but it will affect 'pull-current'. But I see no difference in turn-off time from 10 Ohm-1000 Ohm. Gate turn-on is already good, 10 ns. – Ever-a-Student May 07 '21 at 08:34
  • Oh you're thinking that you should use the gate driver instead of the P-channel MOSFET? No, you should use the gate driver to drive the gate of the PSMN041. I thought that that was "obvious". Oh, no, it's an NMOS, you have just drawn it upside down. Please follow the circuit drawing conventions: https://electronics.stackexchange.com/questions/28251/rules-and-guidelines-for-drawing-good-schematics/28255#28255 – Bimpelrekkie May 07 '21 at 09:43
  • You probably also don't understand @aconcernedcitizen remark of things being upside down. You have drawn the circuit upside down. General convention is to draw positive voltages (like a supply) at the top and ground (0 V) at the bottom. That's why I thouth your PSMN041 was a PMOS. But it's an NMOS, and drawn upside down. Sigh. – Bimpelrekkie May 07 '21 at 09:49
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    @Bimpelrekkie, I sense a fury in your reply. Was I offensive ? If so, apologies. Can you kindly suggest gate-driver with 0.1 ohm ON resistance ? Can you please explain your point about time-constant calculation. Thanks. – Ever-a-Student May 07 '21 at 10:19
  • @Bimpelrekkie, Your comment - gate-driver to drive MOSFET, not piezo - is the answer ! Can you please convert the comment into a Reply so that I can mark it as the answer ? Thanks much. – Ever-a-Student May 07 '21 at 11:28

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