-1

What is the reason behind clock domain crossing? When do I use it? Do I use it only when I am transferring data from one CLK to another?

Transistor
  • 168,990
  • 12
  • 186
  • 385
GOTLN TFT
  • 3
  • 2

1 Answers1

1

You use clock domain crossing in three situations:

  • when crossing between unrelated clock domains (fully asynchronous)
  • when crossing between related domains, but with large skew between them (synchronous, same clock, not phase aligned)
  • when crossing between related domains, but with divisor (synchronous, divided clock)

The first case is intuitive: of course if the clocks are async it's a boundary cross.

The second case comes up as designs grow larger and become more difficult to close timing, even though all the elements are in the same clock domain. Breaking these large blocks up into smaller ones with domain crossings reduces the scope of each domain, at the expense of latency.

The third case also helps timing closure by easing constraints on blocks that don't need be fast, and can make do with a slower submultiple of the system clock.

hacktastical
  • 49,832
  • 2
  • 47
  • 138
  • Your second bullet is sometimes called "[plesiochronous](https://en.wikipedia.org/wiki/Plesiochronous_system)" - same frequency, but arbitrary phase that can sometimes vary by multiple clock cycles. – Dave Tweed May 04 '21 at 23:47
  • That's a different category, like when there is a clock recovery going on. It should in most cases be treated the same as async, with FIFOs sized to absorb the long-term variations. For bullet #2 I was referring to skew in a clock tree. – hacktastical May 05 '21 at 00:03
  • I've heard the term mesochronous. Same frequency, constant (but arbitrary) phase difference. – Matt May 05 '21 at 01:14