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First of all, I am new to the area of electronics and I want some help to stuff that may sound to you a little obvious.

I've seen a circuit using transistor that is used as a NOT logic gate, as in the following image

enter image description here

I understand the way the circuit works. But what bothers me is the fact that the analysis of the specific circuit is based on the fact that the output of the circuit(denoted by A with a dash) has no current flowing through it. But when I want to use that NOT gate, I must connect it to an external circuit(like an LED circuit) to see the results, which means that an amount of current will flow through output as well.

I've seen that kind of analysis where you consider the current of the output to be zero in many other circuits. What I thought is that the external circuits that we connect to it's output has infinite input impedance, meaning that current is very small, practically zero. Following that, I found as a solution to the problem the use of a buffer. In other words, we can use the following buffer circuit

enter image description here

which gives us infinite(very high) input impedance.

Combining the two circuits we have the following:

enter image description here

Is that a correct solution to the problem?

  • Comments are not for extended discussion; this conversation has been [moved to chat](https://chat.stackexchange.com/rooms/123786/discussion-on-question-by-anastassis-kapetanakis-a-simple-circuit-of-not-using-a). – Voltage Spike May 04 '21 at 15:24

1 Answers1

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The thing to notice about your NOT circuit (the first schematic you posted) is that the output is connected to two things: a resistor and a BJT collector. The BJT collector can actively pull down hard on the output. This means it can sink a lot of current and the output voltage is relatively independent of the loads being driven (up to a point, of course.) The resistor, when the BJT isn't pulling down, does not pull actively up on the output. Instead, it pulls much more weakly and the output voltage depends entirely on the loads being driven.

Basically? It's a one-sided deal. You've got an active pull-down but a passive pull-up.

Now, you have realized that an NPN emitter-follower can source a lot of current, which it can do. But notice that now you've just gone and added a pull-down resistor? This means the new addition is still one-sided. It's just that now you've got a passive pull-down and an active pull-up. All you've managed to do about the original problem is exactly nothing. Except that you've inverted your problem. But you haven't fixed the fact that one quadrant uses a passive device. You are just moving deck chairs around.

Still, you can design RTL. But you have to make design choices. In earlier RTL days (short-lived, luckily), there were fine NPN BJTs and not so much fine PNP. So the choice to actively sink and passively source was a given. There's not a lot more to cope with. If you choose a stronger collector resistor, hoping to drive more loads with it, you immediately also find that this means more base recombination current is needed in order for the BJT to actively pull down on that stronger collector resistor. But this means the input must sink more current to achieve that. So if you cut the collector resistor's value in half so you can double the number of loads, you find that the loads also now need twice the drive, too. So you are back to square one, again.

Replacing BJTs with MOSFETs does make things easier at first glance but it doesn't change the fact that you have a passive pull-up and an active pull-down. As speeds increase, the MOSFET gates require more current during switching and you are right back where you were before. At some point you just have to limit the loads.

A better option may be to actively drive both quadrants. But that means at least two driver BJTs and probably at least one more signal-splitter or cascoded BJT. But at least now you can drive some serious loads.

The answer to your final question, though, is "No, it isn't."

jonk
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  • So, how is a modern NOT gate that we find in IC chips constructed? – Anastassis Kapetanakis May 04 '21 at 10:33
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    @AnastassisKapetanakis They are *designed* and not done by just slapping a few 'obvious' parts together. The details depend greatly upon the technology, though. Modern CMOS NOT gates are designed quite differently from TTL and come in [buffered and unbuffered versions](https://www.ti.com/lit/an/scha004/scha004.pdf) and can also be *tr-state*, too. TTL NOT gates come in a variety of flavors: *open-collector*, *totem-pole*, and also *tri-state* output versions. Again, the details are different. But in every case they are *designed*, which means they have ***key specifications*** to meet. – jonk May 04 '21 at 16:30
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    @AnastassisKapetanakis Mr. *"deep-6-it quick-draw-McGraw"* (aka Voltage Spike) buried some helpful links I provided you. So I'll unearth them. See: [single-voltage RTL design example](https://electronics.stackexchange.com/a/281320/38098) and [TTL totem-pole analysis](https://electronics.stackexchange.com/a/304722/38098), for a simplified example of designing RTL and a discussion of an actual TTL totem-pole design. It you can narrow your question down still further, I will try and help answer it. – jonk May 04 '21 at 16:37