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So as an example for self-learning, I am trying to place two Flip Flops (FFs) at a certain distance apart.

Except for these two FFs which must be at a certain distance apart, other cells might occupy any place (in between, etc.).

The two FFs are "FSM_reg_3_" and "FSM_reg_4_" in the following example.

In order to achieve that I wrote this TCL code using create_rp_group, but getting this unknown command error shown in the DC.

Does anyone know the reason?

zzzz za
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  • You should give more context about the compiler product and the target you are working with – Lorenzo Marcantonio Mar 31 '21 at 07:44
  • It's ASIC and I have the verilog design as an input to Design compiler which then links to the tech library say 90 nm ...then I have the synthesized design ..Does that answer the question? – zzzz za Mar 31 '21 at 08:18
  • Every design tool has a forum. You can post there for better responses as this is tool-specific and nothing to do with EESE – Mitu Raj Mar 31 '21 at 16:33
  • Add information to the question, don't dribble it out in comments. –  Mar 31 '21 at 16:37
  • @MituRaj Where do I post for my kind of problem..any idea? – zzzz za Mar 31 '21 at 19:06

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