I am using MCP16322 buck regulator powered from 12V and outputs 5V and 2A. Is it ok to connect the output of two of these in parallel? Does connecting the outputs in parallel mess up the maximum capacitance values on the output of the regulators? Is it better to connect the outputs in parallel via diodes? The diodes will cause a .7v drop though which I rather avoid.
Here is the application circuit.
Directly connecting the outputs of multiple regulators, switched or linear, is inadvisable for the following reasons:
A marginal difference in output voltage would cause high currents to flow between the regulator output pins, potentially damaging one of the regulators.
The MCP16322 is rated for 2% precision, hence for a 5 Volt nominal output, one regulator could be at 4.9 Volts, the other at 5.1 Volts. The 0.2 Volt gap would cause current flow between outputs limited only by the rail impedance of the regulators.
Any delay in powering up or powering down of either regulator would cause a back-feed from the powered regulator to the non-powered one.
By design, the approach stated in the question will have one of the regulators operating while the other may not be - if one of the power sources is off at a given time. This is a failure mode with strong likelihood of device damage
Even if the two regulators were powered by a common source, there will be mismatches in power-up timing while the two oscillators are starting up. This is why sequencing of power supplies is required, and there are special-purpose parts for this sequencing.
There will be higher peak voltage / peak current demands on output stage capacitors of the regulators, due to additive effects of the (non-synchronized) ripple voltages of the two.
A buck controller that supports synchronization and sequencing would be required, instead of the selected device. If the design proposed in the question is used as-is, even if there is no immediate failure, component deterioration would reduce the expected longevity of the device due to repeated exposure to stresses not designed for.
The solution:
Instead of a diode-OR of the outputs of the two buck regulators, use diodes to merge the 12 Volt input sources. The design can then use a single buck regulator instead of multiple. The datasheet indicates that the regulator will not have any trouble using a 11.3 Volt input instead of 12 Volts, to produce a regulated 5 Volt output as desired.
This article about sequencing of multiple voltage rails might be useful reading, it discusses the sequencing and component degeneration issues.
It is generally not a good idea to parallel the output of two power supplies. Both power supplies are unlikely to be at the same exact output voltage. As a result one will tend to try to supply all of the load whilst the other one will tend to idle along at low load. Depending upon the filtering characteristics used in the feedback networks on the two power supplies it is possible that oscillation could also happen.
Now all that said there are power supplies designed that are specifically designed to be able to be paralleled. These often have a special sense line that connects between all the power supply outputs that is used to support a balanced current sharing between the supplies. Designs of this type are more expensive and do add additional components to the circuit board. Current sharing supplies also have to add additional levels of fault detection to ensure safe operation/shutdown in the event that the common current sharing scheme fails or some component in a particular power supply fails.
It is not uncommon to see this type of parallel usage power supply used in server computers where power delivery is added in modular manner to the server as additional CPUs, memory and I/O boards are added to the server. Many of these power supplies contain internal microcontrollers that run sophisticated fault detection algorithms to make them safe in failure modes.
This can be achieved if the regulators provide certain pinouts.
Generally, they need to share feedback for current-control, have synchronized clocks, and operate out of phase to reduce ripple.
To overcome the problems due to parallel connection (mentioned in earlier answers) you can make some circuit modifications as listed in this article at Electronic Design or this application note by Texas Instruments.
Synchronization is important because the fixed 200-kHz switching frequency varies slightly from part to part. If the two parallel converters are allowed to run at different frequencies, the output ripple may, over time, carry some undesirable low-frequency ripple components that equal the difference in frequency between the two ICs. Running the two ICs 180° out of phase reduces input and output ripple. Usually, one IC is increasing current while the other IC is decreasing current, allowing the ripple current of one to counteract the ripple of the other. This minimizes stress on the input and output capacitor energy banks. The two-converter circuit requires half of the capacitance that's needed for a single high-current IC circuit with a 4-A load current. In applications that demand a wide range of duty cycles, the two-IC ripple is a little more than half of the single-IC ripple. For both ICs to evenly share the load, tie the outputs of the error amplifiers (VC pins) together. The differences in the two error-amplifier and feedback-network gains are removed. Electronic Design
Current-mode control is usually required when designing parallel converters. If the COMP pin voltage of two converters in parallel are connected together and the power stage transconductance of each are closely matched, then the two parallel converters each contribute an equal amount of load current. The fed-back portion of the output at V_SNS must be the same for both devices. Use a single-voltage, set-point divider network, and connect the V_SNS pins together to accomplish this. The devices must operate at a common frequency with a synchronous clock. It is preferable to use an external clock source driving the RT/SYNC pin. Driving one device out of phase with the other reduces the ripple on the input voltage supply; so, an inverter is used to produce an out-of-phase clock circuit from the external clock source. Both the devices must start up at the same time. Hence, the SS/TR pins of both devices are connected together. The V_SNS pins also are tied up together to maintain the same error voltage in both the devices. Texas Instruments
Of course it all depends from circumstances but this recommendation may help you to enlarge current capability of yours design.
No it is not recommended. As already pointed out there will be tolerances in the circuits, leading to slightly unequal output voltages. The buck with the highest output voltage will 'win' and supply all of the load current at first. When it reaches its current limit, its output voltage will collapse. At this point, the DC-DC with the lower output voltage will begin contributing.
It is quite common in industry to parallel DC-DC converters using a technique called voltage droop. This is basically creating an artificial resistor in series with the output of the DC-DC converter to aid current sharing. You can read more in this article.
Yes, this is possible but with a lot of complications involved using transformer based solutions such as managing current sharing.
There are capacitor based solutions as well, which are recently being invented that don't have to worry about current sharing as much, and are detached by frequency of operation, though there are probably other issues.
A lot of the industry uses POL to manage the conversion right at the CPU or point of load, but there are some companies looking for alternatives. Though I imagine multi-phase solves this for certain applications. Though it's quite a bit expensive in terms of board area and cooling solutions. Cuk converter may be a good alternative as well for reliability and long lasting solutions.
