I have the following circuit and I'm wondering a little bit about the functionality of the output transistors M12-M19.
simulate this circuit – Schematic created using CircuitLab
I know that M1,M2,M6 and M3,M4,M5 are two differential pairs and I also think, that M19,M12 and M16,M14 redirect/combine the current from positive and negative input to one current.
What I don't fully understand, though, is the idea behind M13,M15,M17,M18. I believe, that the node connecting all four gates and the drains of M18 and M17 should always have a voltage exactly at the mean of M18's and M17's sources. So I was thinking, that M13 and M15 could be cascodes, with M18 and M17 being a self-biasing network.
Is this pretty much it or is there more to the eight transistors on the right?