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I am looking into electrolysis efficiency using an auto-locking PLL circuit that is supposed to latch onto the resonant frequency of the electrolysis cell, a frequency determined by the inductance of the bifilar coil and the capacitance of the cell containing distilled water.

To that end I have acquired a circuit for which I have assembled and built a PCB design (attached) and, to help me understand how it works have also drawn up a flow chart (attached) showing the logic of its operation.

So far I have been unable to get the PLL to lock and so I wanted to check that the circuit is correct based on the functional diagram of the HEF4046B chip (also attached). In reading the datasheet and how the PLL works, it uses two types of comparator and I think my circuit is using comparator 1 and yet the output of comparator 2 (Pin 13) is also used. My query is, whether this circuit is right to do the job.

For example, I was wondering if instead of PLL output Pin 13 being fed back to its Pin 9, via the NOR gates and Switch, Pin 1 should be instead?

I hope this is not too complicated a question but to someone familiar with this type of chip and circuit I think it will make sense.

Thanks

PLL flow chart PCB Schematic 4046B Diagram

  • **Auto-lock** is an added complication to the PLL chip that could deter phase-locking if it mis-behaves. **PhaseComparator 1** is used when locking to noisy signals. Can you see on **TP4** the resonant frequency - perhaps noisy - on an oscilloscope? If so, in manual mode, try adjusting RP3 so that pin 14, **VCO_out** has close to the same frequency. Then trace the phase comparator output(s) voltage thru all the NORs & switches & RC's back to pin 9 (VCO_in). Those auto-lock sweepers can be tricky to troubleshoot. – glen_geek Mar 03 '21 at 18:21
  • The HEF 4046 is old enough to have grey hair .Why not use the old enough to vote HC4046 that is more accurate and has a third very usefull for you phase comp that is RS based .I have done this on other stuff .Your signals are big and well above any noise . – Autistic Mar 03 '21 at 21:00
  • @Autistic HC4046 only accepts Vcc of about +6V. The older metal-gate CMOS 4046 accepts up to +18V Vcc. – glen_geek Mar 03 '21 at 22:07
  • glen-geek, as I don't know precisely enough the resonant frequency it's hard to set the centre frequency close to it. As far as you can see from the circuit layout, do I have the PLL pins 1,2 & 13 correctly wired? It seems this is using comparator 1 so why is Pin 13 (comparator 2) being used to feedback to Pin 9? To test if the chip locks, what about if I put a 5v high onto pins 1& 2 together which should flip the switch and get the output (13) routing back to input 9? – Julian Perry Mar 04 '21 at 09:36

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