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Different scientific publications [1,2] mention that DDRx memory has a (data) retention time of 64 ms while on average each cell is refreshed every 7.8 us (tREFI). I want to know where this information originates and I was looking into the DDR4 SDRAM Standard (JESD79-4B) but it does not mention anything about these 64 ms. Also, I couldn't find anything about these 64 ms in earlier DDRx standards.

Where is the data retention time of 64 ms defined? For me, it looks like this is something that the DRAM vendors guarantee for their products (e.g., [3]). However, this raises the question why 64 ms and not more or less? I guess that is again due to the DDRx standard?

References

[1] Section 2.2, paragraph 1: https://dl.acm.org/doi/pdf/10.1145/2508148.2485928

[2] Section 1: https://dl.acm.org/doi/pdf/10.1145/2637364.2592000

[3] Page 1 (left column, 5th item): https://www.micron.com/-/media/client/global/documents/products/data-sheet/dram/ddr4/4gb_ddr4_dram_2e0d.pdf

Patrick
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  • https://www.mdpi.com/2072-666X/10/9/590/htm more is possible but gaussian distribution of leakage rendering lower T decay rates is hard to anticipate needs to be like 6 sigma – Tony Stewart EE75 Feb 09 '21 at 16:32

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The 64 ms are mentioned in the standard by tREFI. It is usually 7.8 us, multiplied with the number of rows you will end up at 64 ms per cell. However in the new standards the DRAMs refresh several rows at the same time (c.f. https://dl.acm.org/doi/10.1145/3132402.3132419)

The reason why we have 64 ms is a good trade-off between safety and performance. However, the 64ms is also not a constant the tREF depends also on temperature. Above usually 85 degrees this changes (see datashees and standards)

In this works:

you can find some retention time plots for different temperatures of DDR4 technology, that we measured on real devices.

Matthias
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