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Supposing I built some machine x3 that is capable of multiplying the input by 3. If I want to multiply some number with 3^3 then I should use 3 instances of the machine.

My book asked for another solution using minimal hardware. The solution appears in the image I have added, where S is 0 for the first clock cycle and then for other cycles it's 1 to allow previous result to enter and multiply it by 3.

But I can't understand why we need the flip-flop here? Why can't we just connect the output of x3 directly to the mux? What's the problem with that?

I know it's wrong because removing the flip-flop will result in using less hardware so if it was true my book would mention it.

enter image description here

Shashank V M
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carlos
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    What would happen if you didn't have the flip-flop? How would you know when to read the output, so that you get the 3-times multiplied output instead of the 2-times or 4-times multiplied output? And what if not all the bits are calculated at the exact same time - say, if the LSB is faster? – user253751 Feb 02 '21 at 09:14
  • you mean the FF, I can have some output or counter @user253751 – carlos Feb 02 '21 at 09:15
  • and what would the counter count? – user253751 Feb 02 '21 at 09:15
  • how many times I used x3 – carlos Feb 02 '21 at 09:27
  • You? *You* don't get to decided how many times to use X3. It's not like X3 has a button on it, and every time you press the button, it calculates. It calculates as fast as it wants. It might even calculate the different output bits at different speeds. – user253751 Feb 02 '21 at 09:31

2 Answers2

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I mean...you don't technically need a clock, but if you decided beforehand you want to use a clock then you would need the flip flop.

Why would you want to use a clock? It makes timing and synchronization in system easier to control and more predictable which makes it easier to design and test for. Really important in a large, or even moderately sized system.

Flip-flops are the quintessential edge-triggered logic. Along with the fact that they have memory, this makes them the gate-keeper component that can block when there is no clock edge, sample signals on the clock edge, and preserve the output signal away from a clock edge. Flip-flops allow the the clock control the flow of signals from one component to the next.

In your example, if you did not use a clock and removed the flip flop you would be relying on the propagation delay in the wire from the output of the 3x block to the input of the mux. If you're lucky, it would continuously multiply at an insanely fast, uncontrollable speed. If you're not lucky it would try and multiply when the signal at the input was at half transition and give out garbage over and over again.

To slow it down you would need a really long wire to delay things which introduces other issues and is precarious. Or, you use a flip-flop controlled by a clock regulate when the output gets fed back to the input.

For more information, look up "synchronous vs asynchronous design".

DKNguyen
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    Thanks, you explained everything except this point "but if you decided beforehand you want to use a clock then you would need the flip flop" why using a clock requires using FF? can you kindly elaborate this important point? Thanks! – carlos Feb 01 '21 at 23:43
  • @carlos See edit. – DKNguyen Feb 02 '21 at 03:41
  • Thanks, to make things clear I don't really need flip flops with clock, but it's only to keep things ordered correctly (writing on edge rise and so on) technically I can totally ignore the flip flop from my design while keeping the clock is that correct? But in the same way when I write always_ff in system verily it creates a ff I am confused a lot – carlos Feb 02 '21 at 09:14
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    @carlos, you need to understand timing to understand the need for a flip-flop. See my edited answer which now includes a link to a free resource for learning about this topic. – Shashank V M Feb 02 '21 at 09:47
  • @carlos Suppose you use a clock, what inputs and components are you going to run the clock to if you aren't going to use flip-flops? You can't run the clock to level triggered inputs since they will run as fast as they can while the clock is high. You need edge triggered inputs so it only runs once per clock. Flip-flops are some of the only components that are edge triggered and have memory so preserve and hold the signal between clock edges so other level triggered inputs only run once per clock. – DKNguyen Feb 02 '21 at 14:20
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To understand the need for a flip-flop in this circuit one needs to understand Sequential Circuit Timing.

You can refer to MIT's OCW videos on this topic to learn more: https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-004-computation-structures-spring-2017/c5/c5s2/c5s2v8/

Here are the reasons that makes a flip-flop necessary in this circuit:

  • This circuit has memory, since the output depends on the previous inputs.
  • Since this circuit has memory, there are 2 design choices:
    1. Do asynchronous design. There is no clock here. One depends on propagation delays instead.
    2. Do synchronous design, the operation of the circuit is controlled by a clock.
  • Asynchronous circuits are more difficult to design. Propagation delays will vary with temperature. This can cause problems like glitches and race conditions.
  • Synchronous circuits are easier to design and their operation is more reliable. Synchronous circuits are also easier to analyse.
  • Synchronous circuits can either use latched logic or clocked logic.
  • Clocked logic uses Flip-Flops, which are edge-triggered. Clocked logic is preferred over latched logic since it is easier to design and analyse. See this answer for more details on why clocked logic is preferred over latched logic.

If the design is implemented as clocked logic, then a flip-flop is a necessary part of the circuit.

Shashank V M
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