How to build an arbitrary (one-shot) pulse generator?

Question

I need a circuit/IC that can generate a single pulse with a variable pulse width (I would want a minimum of 50 ns but if that is not possible the next minimum can be 1 μs, and even if that is not possible then the final minimum can be 5 μs, depending on the achievable minimum, correspondingly the max can be 5 μs, 5 ms, 25 ms respectively) and variable amplitude with both positive and negative pulses in a range of ±5 V (practically the operation would be in ±2 V range) with a resolution of at least 10-20 mV. The variables need to be digitally controlled (preferably) but this is not a requirement. The current output can be a maximum of 2-3 mA. So I have searched a lot of the pulse generator ICs (monostable) available from different websites and companies (analog devices, data delay, maxim, etc) for 4 days now and I don't have anything that is the proper solution. All of them have variable pulse width and ± pulses which is good but the amplitude is the same as supply voltage and is not variable which is not good for me.

Here are the links to a few of the pulse generators I have searched for:

LTC6993

DS1040

Data delay devices 3D3608 & 3D3612

The closest I have come to some potential solutions (might be wrong) are:

A. Pick any monostable multivibrator (such as LTC6993) and do either of the following for amplitude downscaling:

1. Use an 'AC voltage divider' or a 'Capacitor voltage divider' as mentioned in this answer. But I am not sure if this is the right way or if I should be careful about something such as drive current or capacitance of the pulse generator IC.

2. Use the output pulse (with an amplitude of 3.3 V / 5 V) of the monostable pulse generator to control the gate of a MOSFET with a lower drain-source voltage (typically 0.5-2 V) generated by a DAC.

B. Use a DAC to generate the (one-shot) pulse directly, I am not sure if it is possible to do this accurately (like a 1 μs pulse). If it possible, what kind of sampling rate/settling time/speed specifications I am looking for?

Thank you for reading everything. If you have a solution/advice (in form of a component, circuit, or a suggestion) please let me know, I would really appreciate it.

Answer 1

Just add another component:

1. Pick any monostable multivibrator that can generate a pulse with the desired timing characteristics;
2. pick any (slow) two-channel DAC to generate the two desired, constant output voltages (if one output voltage is always GND, you need only one channel);
3. use an analog multiplexer (random example: TS12A12511) to switch the output between the voltages.

If the DAC's outputs are too weak, add buffers before or after the switch.

Answer 2

This is a perfect use case for a microcontroller, DAC, and a voltage controlled amplifier. With minimal load, an AB audio amp and SPI or on-die dac I estimate your system will hit the 1 us single shot requirement with appropriate firmware on an 8 bit MCU.

Answer 3

Do as much as possible in the FPGA that you already have:

Since there is a 100MHz clock, the period is 10ns. The minimum counter division is 5, which is easy, getting to 50ns. The maximum counter division for your stated 25ms is 2,500,000.

$$\text{ceil} \left( \log_2 \frac {25\text{ms}} {10\text{ns}} \right) = 22$$

You need a minimum 22-bit counter in your FPGA, which is also easy.

The simplest output stage is a parallel-connected passive R2R ladder connected to a high-speed op-amp buffer - two components. The Zedboard does not come with an integrated DAC so these components will need to be off-board.

For 10mV in a 4V range,

$$\text{ceil} \left( \log_2 \frac {4\text{V}} {10\text{mV}} \right) = 9$$

$$ \frac {4 \text{V}} {2^8} = 15.6 \text{mV} $$

which is within your 10-20mV requirement. 8-bit R2R DACs are common enough but you'll want to test thoroughly for linearity and monotonicity.

Since you need double-ended (negative rail to positive rail) output, you could reconfigure your op-amp to have a super-unity gain and accept double-ended power supply. This comes with a list of caveats, including: scaling your resistors will be influenced by their interaction with the input capacitance of the op-amp, so mind its slew rate and input capacitance declarations. The example values below scale from a DAC voltage of 0-5 to a working output of -2 - 2. Having a buffer U1 between your R2R DAC and R1 is important.

^{simulate this circuit – Schematic created using CircuitLab}

Alternatively, pay more for an integrated DAC such as the TI DAC8581. This DAC supports +/- 5V bipolar output but requires 650ns to settle. You will find it challenging to get an integrated DAC that is much faster.