I am challenging myself to create an analog voltage storage device. I came up with some ideas and I would like some inputs on what is bests and maybe new ones.
Ideally, I could store a voltage in a capacitor (electrolytic) and that's it. However, nasty leak currents and parasitic effect will result in a slow but inexorable drop in capacitor voltage.
Let's try with the easy one first:
- Connecting the capacitor to a 1 MΩ resistance to the power supply. It is a wild assumption that the leak current will be the same across the Capacitor voltage but it would at least reduce the discharge effect. PROS: Simple, effective. CONS: it will slowly charge/discharge the capacitor above/below a certain Voltage depending on the internal resistance.
- Use an op-amp to read the cap voltage, compare it with a second capacitor and push current to both capacitor if there is a drop (recharging both caps with one current burst). PROS: will compensate the cap Leak across all voltages. CONS: complex and requires fine tuning to avoid positive feedback. I want to store the voltage in the 1 μF capacitor.
- Use of integrator: Kind of same as option 2. I want to store the voltage in the 1 μF capacitor.
- Another idea is to use an op-amp as Leak Current detector and cause a proportional voltage response to recharge the cap for the exact same charge (need still to figure out the details.)
Any other suggestion?