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I'm using an STM32H7 and looking to sample a digital signal at ~6MHz directly into memory with periodic interrupts? I've seen an approach using a DMA read from the GPIO ODR address but this would seem to sample as fast as the DMA can read from the peripheral. Using a timer interrupt its possible to achieve 2MHz+ but these interrupts are costly from the perspective of CPU time as they are occurring at the sampling rate.

Is there another approach I'm missing or not understanding, such as abusing I2S, that could permit a ~6MHz sampling frequency into a memory buffer in batches of hundreds of samples? This would permit the CPU to crunch on the bitstream while the hardware continued to fill the next samples buffer.

It's possible to change to other chips in the STM32 family or another SoC all together if it helps solve this problem.

Chris Morgan
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    My 1st guess would be to 'abuse' a SPI master module for this. Connect your signal to be sampled to the MISO pin and don't bother configuring the SCK pin. DMA from SPI over into RAM and configure the DMA to interrupt at convenient block sizes. – brhans Dec 30 '20 at 04:49
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    It should be possible to trigger a DMA transfer with a timer, isn't this exactly what you need? – Justme Dec 30 '20 at 06:22
  • See "AN4666 - Parallel synchronous transmission using GPIO and DMA" – Tagli Dec 30 '20 at 06:42
  • @Tagli I've looked at AN4666 and the corresponding example code. It's for the F4 and Lx series and I'm having trouble following how some things like __HAL_LINKDMA() map for the H7. Is there an example of this for the H7 series that you are aware of? – Chris Morgan Dec 30 '20 at 22:55
  • @Justme wouldn't the DMA transfer occur as fast as possible? I'd be looking for each gpio read to occur at a given rate. I'm probably just clueless but I don't see how that is possible without CPU intervention on each read. I'd like it to be say 256 reads at say 6MHz. – Chris Morgan Dec 31 '20 at 02:19
  • Why would it run as fast as it can, if you set up a timer to run at some rate to trigger a DMA transaction? And by the rate you mean the IO pins are read at rate of 6 MHz per one read? – Justme Dec 31 '20 at 07:00
  • @Justme correct that I'd like the gpio read at a rate of 6MHz into a memory buffer, hardware only. If I could figure out how to get the timer to start the DMA but preserve the memory settings that would work. Then the timer could expire at 6MHz, each time triggering a DMA read from a non-incrementing address and writing it to an incrementing address. Still not sure how you'd know how far the dma reads had gotten so you could perform the background processing of data for example when the data buffer was half full... – Chris Morgan Dec 31 '20 at 13:06
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    With half buffer and full buffer interrupts? – Justme Dec 31 '20 at 13:13

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Yes there is.

Set up a timer to trigger a DMA transfer from GPIO port to memory buffer at a rate of 6 MHz.

Justme
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  • Would you have any pointers on how that triggering is configured? I see the use of __HAL_LINKDMA() which appears to be a bookkeeping thing and non-functional from what I read. I don't yet understand to trigger the dma from the timer. – Chris Morgan Jan 02 '21 at 03:02
  • This isn't a reliable method. The DMA has a lower priority than the CPU core so there is no guarantee it will sample on each clock cycle, some samples may be delayed. – user Nov 27 '21 at 15:40