VHDL process, nested if statement execution

Question

I am relearning VHDL and have a question about the code below. This is from a tutorial I have been following. When a button is pressed, an LED gets turned on after the person releases their finger from the button. I am confused about the order of execution in the process. Specifically this line: if i_Switch_1 = '0' and r_Switch_1 = '1' then

I have been reading that inside processes the code is executed sequentially, so I do not understand how this gets executed, since they are assigned to the same value right before.

Thanks

library ieee;
use ieee.std_logic_1164.all;

entity Clocked_Logic is
    port(
        i_Clk : in std_logic;
        i_Switch_1 : in std_logic;
        o_LED_1 : out std_logic);

end entity Clocked_Logic;

architecture RTL of Clocked_Logic is

signal r_LED_1 : std_logic := '0';
signal r_Switch_1 : std_logic := '0';

begin
    p_Register : process (i_Clk) is
    begin
    if rising_edge(i_Clk) then
        r_Switch_1 <= i_Switch_1;

        if i_Switch_1 = '0' and r_Switch_1 = '1' then
            r_LED_1 <= not r_LED_1;
        end if;
    end if;
end process p_Register;


o_LED_1 <= r_LED_1;

end architecture RTL;

you are dealing with hardware, not software ... there is a delay between input states and output states — jsotola, Nov 06 '20 at 19:48
Signal assignment semantics and delta cycles. https://stackoverflow.com/questions/13954193/is-process-in-vhdl-reentrant/13956532#13956532 — , Nov 06 '20 at 19:49
The answer to this question is teaching the basics of VHDL and it's a Q&A site, not a step-by-step tutorial or discussion site. I won't write an answer because there's tons on the internet. But... Get yourself away from the trap you've walked into: seeing VHDL as a programming language that executes software instructions. It's a descriptor language for describing the behaviour of digital logic circuits. It behaves very differently. Signals are not program variables, they are scheduled in a simulator and circuitry in a chip. It's for you to teach yourself the basics. Good luck with it, enjoy. — TonyM, Nov 06 '20 at 19:56
There is no "execution", as these are hardwares. Btw you can learn C/C++ in 2 months but not HDL languages cz there are more to it. Good luck — Mitu Raj, Nov 07 '20 at 16:53

mrbean · Accepted Answer · 2020-11-06T20:30:09.533

3

Here is essentially what the hardware looks like. The i_ prefix means input or intermediate signal to a register. What you have is one register for detecting a falling edge on the Switch_1 signal and another register for toggling the LED output whenever a falling edge occurs on the Switch_1 signal. Note that wrapping the output of a register back to the input through a NOT gate creates a toggle flop. The toggle flop is enabled (toggles) whenever a falling edge occurs on the Switch_1 signal.

edited Nov 06 '20 at 20:30

answered Nov 06 '20 at 20:05

mrbean

683
5
12

Sorry, I accidentally left that out. @TonyM is correct, the i_CLK signal in the VHDL code should be connected to the CLK inputs of the registers in the drawing. – mrbean Nov 06 '20 at 20:10
Yup all done! Fixed a copy and paste error with the LED register too. Thanks @TonyM – mrbean Nov 06 '20 at 20:23

VHDL process, nested if statement execution

1 Answers1