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I know that any compiler will convert human readable code to binary.

This binary code is a opcode which has instruction+operands in it.

I do not understand how this opcode is decoded at hardware level.

For example: If I have below line of code in C

a = 8;

Lets assume this is converted to assembly as below

mov a,#8h

Finally, the compiler has generated below opcode (I am not sure I have converted this opcode correctly)

74h 0xE0 8h

So my question is when we flash this code to flash of controller, how does the controller understand and perform only "a=8" and not a=b+c ?

I also wants to know how it differentiates between different peripherals like register,RAM ,counters or ports? I came across some c programs where we refer these peripherals with some address (0xE0 for acc ,0x80 Port0) , but how controller fetches/outputs to that particular peripheral or a register bit which was referred in our code.

divakar
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    Different strategies on different CPUs. Got any specific one in mind, or are you looking for half of H&P's book in an answer? –  Oct 18 '20 at 18:53
  • i was looking for answer in general , but its ok if someone answers how it happens in most basic controller which is 8051 – divakar Oct 18 '20 at 18:57
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    Does this answer your question? [What happens at hardware level when we feed a code?](https://electronics.stackexchange.com/questions/474419/what-happens-at-hardware-level-when-we-feed-a-code) – DKNguyen Oct 18 '20 at 19:01
  • I also wants to know how it differentiates between different peripherals like register,RAM ,counters or ports? I came across some c programs where we refer these peripherals with some address (0xE0 for acc ,0x80 Prt0) , but how controller fetches/outputs to that particular peripheral or a register bit which was referred in our code. – divakar Oct 18 '20 at 19:15
  • @divakar Those are performed over a standardized, memory-mapped bus that each peripheral is designed to interface with. At least in the past few generations of ARM processors. The memory mapping is what makes it so you don't need special instructions to interface with the peripherals, otherwise you would need special instructions. – DKNguyen Oct 18 '20 at 19:20
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    What you ask to explain takes roughly one university-level course. For reading, I can recommend the book "But How Do It Know?". – Wouter van Ooijen Oct 19 '20 at 06:37

2 Answers2

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It knows because the 0x74 byte (actually 01111000 in binary) is the "copy next program byte to A" instruction. It's not the "add B and C and copy answer to A" instruction.

Inside the processor is a sub-unit called a control unit, which contains a bunch of logic gates designed by clever people. The people who designed these logic gates, designed them so that when the current instruction register holds the value 01111000, the outputs are the correct control signals to make the next byte get added to A. For example, the "increment program counter" might come on for one cycle, then in the next cycle, the "read memory at program counter" signal and the "copy memory value to A" signal might be turned on.

I say "might" because there are a lot of ways CPUs can be designed, and we can't really be sure how the designers of that specific CPU did it.

Different instructions create different control signals because that's how the designers designed the logic circuit. The "A=B+C" instruction could activate the "copy B to left ALU input", "copy C to right ALU input", "copy ALU output to A", and "add" signals. Which is a completely different set of signals from the ones created by the "A=next program byte" instruction.

user253751
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Original 8051 CPUs tend to use 12 clock cycles per instruction. Therefore it can use 12 clock cycles per instruction, to instruct internal logic gates in a 12-step sequence according to the opcode to select the immediate value from opcode operands onto internal data bus, and store it into some register, which is register A as instructed by the opcode.

The correct opcode to move immediate value of 8 into register A is:

0x74 0x08

Justme
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