I am currently trying to design a 16 nibble RAM on logisim, whereby it takes 4 data input lines.
However, what I am having the most trouble with is converting the 4 address lines into a single input, such that the RAM circuit should read a 4-bit piece of data as input and set this as the value of the nibble that is defined by the address bits.
For example, if Data = 1000 and Address = 0011, then in the next Clock cycle the value of 4th nibble of the RAM should become 1000, and also this value should be displayed on the output.
I know it involves a multiplexer, but what would act as the 4 selector bits?