1

I am looking at the circuit diagram from here

enter image description here

The gnucap description for it is given as

C1 0 2 1UF
R1 1 2 1K
R2 0 2 1K
Vin 0 1 AC 1
.OPTIONS PHASE=RADIANS
.PRINT OP V(Vin)
.OP 0.00 100.00 BY 10.00 BASIC
.END

I can run the simulation on this using gnucap fine, see output. But is there a way to generate the schematic visually from just the textual description above using a simple command line tool?

JRE
  • 67,678
  • 8
  • 104
  • 179
BBSysDyn
  • 115
  • 6
  • 1
    No. This only defines the nodes for KVL rules, not the logical layout and position of endpoints and of wires. – Tony Stewart EE75 Jul 20 '20 at 11:36
  • 1
    The schematic text file have the XY start end values of all components and wires, sheet dimensions and label sizes, the orientation , positions and node values and locations. A similar task is to define a PCB layout using an "autorouter" – Tony Stewart EE75 Jul 20 '20 at 11:38
  • 1
    How to do it better in Javascript. http://tinyurl.com/y5wsqbrf – Tony Stewart EE75 Jul 20 '20 at 11:45
  • Falstad app looks great – BBSysDyn Jul 20 '20 at 12:03
  • How about this approach? Design through a simple UI tool, but generate textual description from it, so I can run it through the command line. Falstad lets me export as text, but I could not have it recognized by gnucap. – BBSysDyn Jul 20 '20 at 12:04
  • 1
    functional vs logical GUI + physical are not the same. gnucap is too primitive. Don't try to reinvent the wheel. Study how the wheel is made. – Tony Stewart EE75 Jul 20 '20 at 12:10
  • Saw https://github.com/xesscorp/skidl, describe circuit through api, generates netlist. LCAPY takes netlist and generates an output? https://github.com/mph-/lcapy/blob/master/doc/examples/notebooks/opamp-noninverting-amplifier1.ipynb – BBSysDyn Jul 20 '20 at 12:24
  • If possible want to avoid UIs altogether. Text files => visual circuit output => simulation. – BBSysDyn Jul 20 '20 at 12:25
  • 1
    that is a complex yet crude attempt for someone who does not understand the universal language in electronics. – Tony Stewart EE75 Jul 20 '20 at 12:47

2 Answers2

4

The only information you get from a SPICE netlist (what you posted) is the bare information of what elements there are and how they are connected. A visual schematic editor involves knowing where those elements are placed and how the wires are drawn (besides appearance and other stuff). Therefore, with only a SPICE netlist you don't have enough information to build, visually, a schematic.

There may be some utilities that try to achieve this, one of them is schematic builder for LTspice, in the LTspice group, which displays all the elements in a grid, all of them having the required labels on their pins (i.e. no wires), and lets you manually rearrange them however you see fit. So, not ideal, but for small shematics, it works.

a concerned citizen
  • 21,167
  • 1
  • 20
  • 40
  • 2
    I didn't know about that tool. I'll have to try it. Hmm. I wonder about using pattern recognition together with good quality schematics might yield something remarkable. Have to consider the idea, later. – jonk Jul 20 '20 at 14:52
  • 1
    @jonk I always had mixed feelings about this: you could recreate lost subcircuits that are a pain to debug/improve/etc, but the "artistic" part is the most difficult and the complications that the software would need might not be worth it. I say this because a simple case of an SR flop, built with two gates, might be a cause for confusion or misplacement, unless there is some database with peculiarities such as this. But then the complexity would grow even more. So IMHO, unless the software would be used on a daily basis, as opposed to an accidental need, it might not be worth it. – a concerned citizen Jul 20 '20 at 15:17
  • 1
    My hope comes because we don't need to be perfect to be good. One doesn't have to get everything right for it to be very helpful. Also, there are a great many well known topologies. And here I don't mean very specific parts but rather organisations of sub sections. So a very general recognition of the basic unitary gain class-A/B output stage is possible, even with unique contributions to sub parts within. As I said, I need to think about it though. Intuition tells me that there exists a useful path here. But it will require a very facile imagination. – jonk Jul 20 '20 at 15:22
  • Don't get me wrong, I wish you all the luck! :-) And, sure, what you said sounds very logic: like in chess, some combinations are very easily recognized (what I tried to exemplify with the SR flop). After all, the creator of that schematic builder must have thought in very similar lines. I suppose this is one of those cases when the finite product would make a ton more difference than any attempt at visualizing it. – a concerned citizen Jul 20 '20 at 15:27
  • 2
    I took on a far simpler challenge in developing a program to translate LTspice .ASC files into very readable, fixed-space ASCII schematics. This includes supporting all possible part orientations. The creativity wasn't just the ASCII library, though that was important, but mostly in working out exactly how much wire and spacing compression would work without losing anything in the process. It was enjoyable and took only a week to achieve. So it was a far smaller project. But it did require some imagination. I can almost see how this could be done. But not quite yet. – jonk Jul 20 '20 at 15:40
1

Drawing good schematics is an art form. See Rules and guidelines for drawing good schematics for a good overview on the topic.

The best you could hope for would be that the program would place and connect the parts with "wires". You would then have to drag the components around to make a sensible schematic. This would be similar to the process used in converting the schematic to a PCB layout.

Transistor
  • 168,990
  • 12
  • 186
  • 385