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In the circuit below the inverter is used to switch 12 volts into a pulse shaping circuit (10k resistor, 220-260pf capacitor, diode and 680 ohm resistor), the output of which is used as the trigger to a monostable 555 circuit. As far as I understand you can use a negative square pulse to trigger a 555 timer circuit as long as the negative amplitude is 1/3Vcc. My question is on why the designer of this circuit decided to shape the pulse instead of drive the 555 timer circuit directly from the inverter?

Circuit

Blargian
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  • https://electronics.stackexchange.com/questions/324207/why-does-this-edge-trigger-work-on-input-of-555-monostable-config – AJN Jul 07 '20 at 09:07
  • https://electronics.stackexchange.com/a/180721/238590 – AJN Jul 07 '20 at 09:22

1 Answers1

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The additional circuit with 260pf capacitor and 680 ohm resistor is a differentiator circuit. It acts as an edge detector to the input pulse. The diode makes it so that the positive edges are removed and only negative edges are passed to the 555 monostable circuit.

The monostable circuit made from 555 is level triggered (1/3 Vcc is the level as you mentioned). With this additional negative edge detector, the full circuit becomes (negative) edge triggered.

See this SE post with a detailed diagram https://electronics.stackexchange.com/a/180721/238590

Potential problem: Looking at the interior circuit of the 555, if the TRIGGER input is held low for longer than pulse length, ... the OUTPUT will remain high. You can get around this problem using a differentiating input

https://electronicsclub.info/555monostable.htm#edgetrigger

Why does this Edge Trigger Work on input of 555 monostable config?

Edit

Redrawing of the negative edge detector circuit is shown below. If input changes so as to take \$V_0 > 12V + 0.7V\$ (during positive edge of the pulse), the diode gets forward biased and starts conducting and the excess voltage is dropped across the capacitor / 10k resistor. The positive edge can create spike which is only one diode drop greater than 12V; i.e. positive edge is not perfectly removed, but limited to one diode drop above 12V.

schematic

simulate this circuit – Schematic created using CircuitLab

AJN
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  • Thank you, that is very helpful and I understand now what is happening with the differentiator circuit. In the configuration shown in the links you shared I notice this positive voltage spike on the transition from 0 to 1. Could you explain why the diode is connected in the way that it is and why the short is added between the negative side of the diode and bottom of the resistor used for controlling the time constant. I understand that it is there to remove this positive spike but the intuition for how it does this is not clear to me. – Blargian Jul 07 '20 at 17:41
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    @Blargian A better way to visualise, is to notice that the capacitor and the 10k resistor are parallel and the **diode and the 680 ohm resistor are parallel**. I have redrawn that part of the circuit. Writing the node voltage for the output \$ V_o = 12 + V_{D1}\$. – AJN Jul 08 '20 at 04:57