Overview: I am trying to work out if it's possible to transmit my 1.2Gbps MIPI data down a 600mm long flexible PCB strip. Assuming I have the impedance correct, will the signal still be degraded by the loss tangent of the dielectric?
Some background: I have already made some test strips, 180mm long using DuPont's AP laminate, and have discovered that the rise time on each is 250ps. When I produce a 600mm long strip, the rise time will be significantly longer.
According to the MIPI spec, I need to achieve a rise time between 150ps - 250ps for my 1.2Gbps DDR clock.
Possible solution: DuPont have another laminate, Pyralux TK, with a lower loss tangent.
Question: Is it possible to estimate the likely benefit of this alternative material. Is there some simple rule of thumb, like: "half the loss tangent implies half the rise time"? Or is this something I simply have to simulate in Polar?
My attempt at an answer: This is a graph from the Pyralux datasheet:
According to my calculations, a rise time of 250ps, gives a bandwidth of 1.4Ghz. Looking at the graph, that equates to a loss of about 0.05dB/cm. Over 60cm, this would be a loss of 3dB, which is equivalent to an amplitude loss of 1.413.
That doesn't seem too bad, although I'm not sure how it relates to my minimum rise time in practice. Do my calculations make sense?
