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I was wondering if dead-time in a bridge design is achieved by the turn-on and turn off resistors as shown below, so that the FETs turn on slower and turn off faster, thus avoiding shoot through. Or does this need to be implemented in code?

Half bridge

Daniel Bashy
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Or does this need to be implemented in code?

In the past I've used gates like this: -

enter image description here

It's fairly unambiguous in its ability to provide anti-shoot-through gate drives.

Andy aka
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  • Thank you for your comment. When buying the NOR and AND gate for this topology, they must have the same propagation delay right ? – Daniel Bashy Jun 05 '20 at 14:11
  • Most gates these days will have propagation times in the sub 10 nano seconds so any difference will be a minor error term compared to the likely (much larger) dead-time you require. Make sure you get schmitt trigger type gates as per the symbol inside the gates. – Andy aka Jun 05 '20 at 14:14
  • Basically I am struggling to understand some stuff. I used the equation Ig = Q/t to calculate the gate current. for 't' I took the value from the MOSFETs datasheet which was (t-rise+t-on = 260ns), this gave me a value for current (Ig = Q/260ns) , and than I calculated the turn on gate resistor (R-on). Than i chose a value 1/3 smaller than the on resistor to ensure the FET turns off faster, is this not the dead time? – Daniel Bashy Jun 05 '20 at 15:41
  • There is no such concept as "dead-time" for a single MOSFET - there is turn on time and turn off time and this is governed by charge and gate capacitance and current into or out of the gate. For a push-pull arrangement of MOSFETs, there is a dead-time concept but this isn't achieved by controlling how quickly or slowly each individual MOSFET turns on or off but by ensuring that one MOSFET gate drive is clearly "off" before the other one turns on (as per the two output waveforms in my picture on the right). – Andy aka Jun 05 '20 at 16:44
  • Thank you for your time. How would I determine how much dead-time I need? and also was I correct to take the MOSFETs rise time value from the datasheet for the 't' in the equation (Ig = Q/t ) in order to calculate the gate current ? – Daniel Bashy Jun 05 '20 at 17:14
  • I can't say how much dead-time you need but I would look at the HCPL-3120 opto couplers because they are prob the weakest link in terms of speed. You must not have both MOSFETs on at same time. I would use a sim tool normally. Regards the data sheet, you should look where they specified the test circuit to see how they measure rise time - I always use the rise/fall time figure and then calculate the gate charge time and add it to that figure as a precaution using \$I = C\frac{dv}{dt}\$ as the formula for the added on bit. Your opto's are going to be nowhere close to that figure BTW. – Andy aka Jun 05 '20 at 17:33
  • sorry do you use the rise time from the MOSFET datasheet or opto? – Daniel Bashy Jun 05 '20 at 17:42
  • I use the rise time figure in the data sheet and add on how quickly I can charge the gate to full drive but, these will be really small numbers compared to the rise and fall times of the opto. The opto-rise and fall times will dominate. I would urge you to use a simulation tool to experiment with. Actually, I've just had a look at the HCPL-3120 and it specified 100 ns rise and fall time so it's not bad at all. Use a sim tool nevertheless. – Andy aka Jun 05 '20 at 17:45
  • Thank you. Do you know a good simulation tools that I can use? also just to clarify you used the rise time of the MOSFET for that calculation (Ig=Q/t-rise) not the opto rise time? – Daniel Bashy Jun 05 '20 at 18:14
  • I use micro cap 12 - it is fully loaded with a lot of models and is free (now) - https://www.spectrum-soft.com/download/download.shtm - choose the top executable in the list. – Andy aka Jun 05 '20 at 18:16
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    Thank you for your help – Daniel Bashy Jun 05 '20 at 18:55
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    Love it. Needed to add dead time for a high speed analogue current controller. That will do the trick! – Cliff Pennalligen Jun 08 '23 at 03:10
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You are right that the diodes make turn-off faster than turn-on. By making the turn-off transition faster than turn-on, that may be sufficient to prevent shoot-through in some designs. It will depend on delays and transition times inherent in the driver, the threshold voltages of Q1 and Q2, and so on.

While this is sufficient for some designs, it's not always ideal. Slowing the transition reduces efficiency, and by the time the transition has been slowed enough to avoid shoot-through, efficiency may have been unacceptably degraded. In that case the designer will opt to postpone turn-on by delaying the control signal to the driver, often with code in a microcontroller but of course simple discrete solutions are also possible.

So to answer your question, designs may use code, asymmetric drive capability, or both to avoid shoot-through, depending on requirements.

Phil Frost
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  • Thank you Phil for your comment. My Optos have a maximum propagation delay of 200ns. The rise time of my FETs are 250ns and fall time is 430ns. The gate threshold voltage is 2V. From this how can I determine the dead-time required? – Daniel Bashy Jun 05 '20 at 13:52
  • @DanielBashy Simulation, build it and tweak it empirically, or just make some estimates and add some margin and call it good enough. It's up to you. – Phil Frost Jun 05 '20 at 18:51