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If I am utilising an op-amp, say a LM321/LM324, say in single-supply operation as a buffer and have a multiple suitable power rails available then are there, assuming I do not expect to utilise the full output swing of the opamp for any of my rails and none of the rails exceed the maximum specification, any potential advantages to using a lower-voltage supply rail?

NeverWasMyRealName
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3 Answers3

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If you have several choices on your VDD supply for the opamp, here are some thoughts:

1) use the cleanest VDD, and plan ahead to sustain the cleanliness. This minimizes the use of area/cost required for "local battery" R+C low-pass-filters on the opamp's VDD. The reasoning for the is the horrid PSRR of opamps at high frequencies.

2) using an LDO output (if clean enough) instead of a higher-voltage switchreg with its spikes and ringing

3) use the same VDD as your ADC, to avoid use of protective clamps between opamps and ADC

4) if you have a huge amount of gain, as in magnetic-field-detection for robot-location, then using separate VDDs for the first few stages versus the final stages, is a way to reduce the likelihood of oscillation by sharing a common VDD.

5) identify the best-regulated VDD, and use that, if the DC_STABILITY is crucial

analogsystemsrf
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any potential advantages to using a lower-voltage supply rail?

Yes, several. The LM324 for example can take as much as 32 V. But if the output goes to a device powered from eg. 3.3 V then powering the op amp from a similar voltage could:-

  1. Prevent injection of current into the power supply of the receiving device (through its input protection diodes etc.), stopping it from malfunctioning or being damaged.

  2. Greatly reduce power consumption in the op amp, reducing temperature drift and improving reliability.

The LM324 draws a maximum quiescent current of 1.2 mA at 5 V = 6 mW, but 3 mA at 30 V which equates to 90 mW. That might not sound like much, but with a thermal resistance of 88 °C/W it would cause nearly 8 °C of temperature rise. In a sensitive circuit the op amp could take several minutes to stabilize at the higher voltage. If the device needs to operate at high temperature that 8 °C could push it over the limit.

But that's not all. When the load draws significant current the power dissipation can be much higher. For example driving a 150 Ω load to 3 V (drawing 20 mA, the guaranteed minimum output source current) would only dissipate 40 mW with a 5 V supply, but a massive 540 mW with a 30 V supply.

  1. The lower voltage stress could improve reliability and reduce sensitivity to power supply spikes and stray currents due to surface contamination of the chip and PCB.

  2. If the lower voltage is supplied through a regulator (or secondary regulator if the primary power source is also regulated) it could be more stable and make the op amp's power supply rejection ratio less critical.

  3. Lower output voltage swing could reduce EMI caused by a strong signal that produces higher output than needed. A 3.5V square wave is much 'quieter' than a 30 V square wave!

Bruce Abbott
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  • Hi, I went with this answer because I think it answered the question most directly and impacted my design, supported by good explanation. Thank you. – NeverWasMyRealName Apr 19 '20 at 16:07
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One main reason: interfacing your op-amp to other single-ended electronics like an ADC or a logic circuit (e.g., a comparator.) This ensures the output swing of the amp doesn’t exceed the input range of the downstream device.

Likewise, if the upstream circuit is single ended, referring the op-amp to a midpoint reference (virtual ground) makes things easier sometimes.

hacktastical
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