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I was wondering if this is possible and if it is done in current designs. Seemed like an interesting enough idea to me. Here's a little diagram I made to help try and explain:

Basic CPU diagram to help me ask the question

So let's say I'm clever and I build a bit of hardware that tracks the number of floating-point operations I've done lately. It tells me, hey, you haven't done any FP operations in the last 2000 instructions! And then decides to "power down" the whole floating point pipeline hardware. Of course, when a FP op does come up in the instruction queue, it needs to turn that power back on, maybe with a delay.

Does this make any sense? Can you "power down" specific parts of your chip and extract real power savings? How (physically speaking in terms of circuits) can you power down parts of hardware? And how hard is it to power them back up?

Sorry if this isn't a good traditional question! I know it's not very specific.

Cheers.

Purple Lady
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JDS
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1 Answers1

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Yes, you can power down specific sections of a chip. In general you don't see this in CPUs by shutting down sections of hardware like the excess FP blocks (like you suggested), mainly because this would lead to weird behavioral changes in the logic based on whether or not an instruction used the powered down blocks.

Where you do see it is in two places:

  1. Power-managed CPUs with multiple cores. The operating system can shut down unused cores in periods of low CPU utilization, but then the operating system will decide when to activate the core, and the core will alert the operating system when it is active. In the meantime, the operating system shunts all operations to the active core (or cores).
  2. On microcontrollers you can activate and deactivate certain functionality by providing power to the functional section of the die. So for example: on most chips you can power or choose not to power the analog to digital converter, and not powering it (even when not in use) will save you some small amount of power (which can be important in very low-power applications).

How you "power down" a section of a chip is pretty straightforward: you have a power transistor that controls the positive input rail to all of the transistors in a section of the chip die, and you turn that on and off.

Kit Scuzz
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  • Excellent! Thank you. Well I like to consider myself a bit of a "researcher" and so this popped into my head. Good to know that it's feasible. Maybe more of this is the way of the future! Everything is power nowadays, right? – JDS Nov 10 '12 at 22:47
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    In fact SPARC does turn off unused FPU blocks. (Sorry, no reference at hand, just from my memory.) – Catherine Nov 11 '12 at 21:51
  • Have you seen ["Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors"](http://www.lems.brown.edu/~yb/lncs01.pdf) ? – davidcary Jun 28 '14 at 08:28