I haven't seen any examples of registering ISRs in Atmel Studio 7, but I've given the following code a go in my IDE.
/*
* mainCode.cpp
*
* Created: 1/29/2020 11:30:58 AM
* Author : tuskiomi
*/
#include "sam.h"
#define CPU_CLK 48000000 //CPU Clock Speed in Hz
#define SYSTICK_INTERVAL_MS 10 //System should always run at 100 Hz
#define SYSTICK_INTERVAL_CYCLES (CPU_CLK/1000*SYSTICK_INTERVAL_MS)-1
#define SYSTICK_CALIBRATION_VALUE (CPU_CLK/100)-1
void handleSysTick(){
}
int main(void)
{
/* Initialize the SAM system */
SystemInit();
SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
uint32_t CPU = SCB->CPUID;
uint32_t CPU_MINOR_REV = CPU&0x000F;
uint32_t CPU_PART_NO = (CPU>>4)&0x0FFF;
uint32_t CPU_MAJOR_REV = (CPU>>20)&0x00F;
uint32_t CPU_IMPLEMENTOR = (CPU>>24)&0x00FF;
//uint32_t SCB->
SysTick->CTRL = 0x05;
SysTick->LOAD = SYSTICK_INTERVAL_CYCLES;
__NVIC_SetVector(SysTick_IRQn, ((uint32_t) *handleSysTick));
/* Replace with your application code */
while (1)
{
}
}
My main concern is with the line:
__NVIC_SetVector(SysTick_IRQn, ((uint32_t) *handleSysTick));
My c++ is very rusty, and what the expression ((uint32_t) *handleSysTick)
is supposed to be is a uint32_t representation of the address that the function "handleSysTick" starts from. If this is indeed the case, then it is safe to say that the interrupt is properly configured.