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I'm trying to wrap my head around if this is how a R-2R DAC should work. I say should for two reasons: (1) because I think I understand the theory behind the resistor ladder of subsequent voltage-dividing, and (2) because I analysed the schematic of a common VGA Pmod from Xilinx, which I would expect to be, well... correct...

So, let's start with the circuit:

enter image description here

With all bits on, this achieves a ~0.7V max, considering the 75 internal impedance of a VGA monitor. Now, I've broken down all the possible combinations and the resulting voltage:

enter image description here

... which, suffice to say, is not what I expected how this should behave. A perfect DAC would be linear. A gamma-corrected VGA DAC would possibly be a curve. But these deltas are all over the place.

So here are the questions: (1) am I interpreting something wrong? (2) Is this how this type of DAC supposed to work? (3) How can we improve over this design?

Hugo Sereno Ferreira
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  • Rushing out. Basic concept looks OK. Impedance of you chain is a constant 540 Ohms but terminated in 75 Ohms. Haven't checked what that will do but have a look. – Russell McMahon Dec 26 '19 at 20:38
  • what happens if you use true R-2R ? ... 270 Ohms and 540 Ohms for example – jsotola Dec 26 '19 at 20:53
  • Without doing the analysis, I think the problem is with the 75 ohm resistor. Take that out and see what you get. R-2R DAC implementations are meant to feed into a high impedance op amp; not a 75 ohm load. – SteveSh Dec 26 '19 at 20:54
  • @SteveSh: Not true. The R-2R DAC has constant output impedance, which means that it forms a simple voltage divider with any load. There is no adverse effect on linearity, etc. – Dave Tweed Dec 26 '19 at 21:26
  • See [How to calculate resistor values for a VGA DAC](https://electronics.stackexchange.com/q/453377/11683). – Dave Tweed Dec 26 '19 at 21:30
  • @Dave Tweed: You're right. I had forgotten that and had to go through a simple example. That being the case, the 75 ohm resistor should not be causing the non-linear behavior shown. – SteveSh Dec 26 '19 at 21:58
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    @David Tweed: I see what happened. The circuit in the OP really isn't a R-2R ladder as used in a DAC because, as Justme pointed out, the switches really need to be a SPDT configuration, connecting the 2R resistors to 3.3V or GND. The circuit OP shown does exhibit a output resistance that varies as the position of the (shown) SPST switches. – SteveSh Dec 26 '19 at 22:24

2 Answers2

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The bits you control are either On or Disconnected, while in general a R2R DAC input would be connected to 3V3 or 0V. Disconnecting changes the impedance. Try with SPDT switches.

Justme
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This is how I would have made a 4 bit DAC on 5.000 V logic.

16 levels from 0 to 4.5V
300 mV per level. Then Buffer output as required.

enter image description here

1R= 50.00k
2R=100.00k
Term = 1.200M
Error = 0 with 300mV per step using trimmed Vcc.

for 3.3V Logic Term=1.6M then 0 to 3.00V max with exactly 200mV /step

Tony Stewart EE75
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