Doubt on PSRR calculation and result

Question

I designed the following circuit in Cadence Virtuoso:

It is a two stages op-amp with a compensation network (resistor and capacitor). VDD=1.8 V, VCM=900 mV, VB2=1.28 V. The DC gain is 73 dB.

1st question: I have to calculate the PSRR (power supply rejection ratio). The book on which I study defines the PSRR as the ratio between the differential gain and the gain from one supply (either VDD or GND) to the output. In order to find the gain from VDD to the output I placed a small signal voltage generator in series with VDD, as in the following picture:

With the two inputs set to the analog ground VCM=900 mV (I removed the input differential signal). I then made an AC analysis. Is this procedure correct to find the gain from VDD to the output?

2nd question: The AC analysis gives this result:

It seems to me that the small signal gain from VDD to the output is too much large: 30 dB. This means that if I have 10 mV ripple on the VDD line, then I will have more or less 300 mV at the output! Moreover, the PSRR = (73-30)dB = 43 dB. How can I decrease the gain from VDD to the output (thus improving the PSRR)?

Answer 1

Question 1:

Yes the method sounds correct. But, you do not need to add a new VDC source in series with the fixed one. Just set AC magnitude of your 1.8V DC source to 1.

Question 2:

The PSRR+ of such opamps will be bad because looking from the supply to the output, it looks like a common base amplifier! Improving PSRR is a very complicated but interesting topic, but most of it boils down to trading off headroom for better PSRR. For a start, look into other opamp topologies. Generally speaking, cascoded outputs offer better PSRR etc. If you have headroom, you can basically precede your opamp with a NMOS regulator. This will essentially cascode your whole opamp from supply noise. Ofcourse, headroom might be an issue now.

Another more sophisticated way to improve it for your opamp, is to some how move the gate of PM67(and/or any other transistor that looks like a common base amplifier from the supply) in sync with the noise at its Source, this way: $$\Delta Vgs = 0$$ To do this you can try a small capacitor between source and gate or even create a secondary gain loop that injects correlated supply noise at the gate of PM67. Yet another way is to drive the body of PM67 or NM28 in a way that cancels supply noise