Microprocessor architecture bits vs bus sizes

Question

I am ready following on this website:

"Another big difference between 32-bit processors and 64-bit processors is the maximum amount of memory (RAM) that is supported. 32-bit computers support a maximum of 4 GB (2^32 bytes) of memory, whereas 64-bit CPUs can address a theoretical maximum of 18 EB (2^64 bytes). However, the practical limit of 64-bit CPUs (as of 2018) is 8 TB of addressable RAM."

It confuses me little that how in the above example of 32-bit system 2^32 is used to calculate the addressable RAM? I thought 32-bits means that the ALU registers length is 32-bits so data bus size is 32 bit instead of address bus. Same for 64-bit architecture. Please correct me if my understanding of architecture bits vs bus-widths is wrong above.

Just to interpret "practical limit of 8TB": there is no real *limit*, it is just that nobody has wanted more than that, so nobody has done the work, in terms of virtual memory architecture, extra pins and so on, in order to implement it. — Martin Kochanski, Jul 03 '19 at 09:56
@MartinKochanski Intel Ice Lake has put the limit on 57 bits for memory bus, 64 TB. — Jeroen3, Jul 04 '19 at 06:17

Oldfart · Accepted Answer · 2019-07-04T06:08:10.297

7

As with many texts written for beginners the situation has been somewhat simplified.

The assumption is that a 32-bit processor does all address operations and calculations also in 32 bits. From that it assumes a 32-bit address bus. Therefore the maximum address range is 4GBytes.
That same reasoning is then extended to a 64-bit processor.

In real life it can be a lot more complex. A good example would be the MC68000 processor, which was sold as a 16-bit processor, had 32-bit wide registers and a 24 bit address bus.

If a processor has an MMU that can also extend a 32-bit address bus to more bits. There are some 32-bit processor systems out there with a 40-bit address bus.
In the early days of computing I added a sort of MMU* to my MC6809 processor which extended the 16 bit address bus to 20 bits giving me a whopping 1Mbyte address range with an 8-bit processor.

*A 16x8 SRAM.

edited Jul 04 '19 at 06:08

answered Jul 03 '19 at 07:37

Oldfart

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my 1st HDD was 6MB from NPL then 10MB Seagate and 5/5MB DMA cartridge – Tony Stewart EE75 Jul 03 '19 at 07:39
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Or the Intel 8086: 16-bit processor, 16-bit address registers, 20-bit address bus (segment registers supply the missing 4 bits). – Martin Kochanski Jul 03 '19 at 09:54
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It becomes even more interesting with bit slice processors. I did a design many years ago based on the old Am2900 family. – Peter Smith Jul 03 '19 at 14:25
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@oldfart: A small correction: The MC68000 had a 24 bit address bus. There was a software-compatible family member with 20 address bits and an 8-bit data bus, the MC68008, so you might have mixed up the two. – sh- Jul 03 '19 at 20:07
@sh- Thank you, text corrected. – Oldfart Jul 04 '19 at 06:08

Microprocessor architecture bits vs bus sizes

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