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My task is to fill in this table the output Q by analysing following circuit

enter image description here

My suggestion would be:

enter image description here

Would that idea be right?

in the digital electronics means: S=1 => Q=1 and R=1 => Q=0

Edit: My question is different from the possible duplicate because I should work here with the previous Q (previous stored data).

lightsodium
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    The truth table for SR latch is standard and well-defined. I don't understand why would you need to make a "suggestion" (which is different from the standard one, by the way). – Eugene Sh. May 30 '19 at 15:36
  • How does the standard look like? I refer to the state table of the SR-Latch build by NAND-Gates in my question. – lightsodium May 30 '19 at 15:42
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    SR is SR no matter what's inside. A component is defined by its functionality, not the implementation. Google "sr flip flop truth table" and you will get thousands of results you can refer to. – Eugene Sh. May 30 '19 at 15:44
  • but in the circuit above there is no clock – lightsodium May 30 '19 at 16:00
  • Possible duplicate of [SR Flip-Flop: NOR or NAND?](https://electronics.stackexchange.com/questions/163164/sr-flip-flop-nor-or-nand) – Kevin Kruse May 30 '19 at 18:04

1 Answers1

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A precise definition of RS latch behavior should define it in terms of R, S, and previous Q and /Q values, recognizing that Q outputs and inputs may be stable high, stable low, or metastable. If either or both inputs is low, the states of Q and /Q will be ignored. If both inputs are high and Q and /Q are in any configuration other than high-low or low-high, both will go metastable, meaning their state cannot be reliably predicted unless or until one of the inputs goes low.

Many descriptions of RS latches, including responses to the "duplicate" question, would regard the "both inputs low" state as invalid, but setting the inputs to that state will not cause any kind of unpredictable behavior unless both inputs are switched simultaneously or nearly so (with the later one being switched before the Q and /Q inputs have stabilized to a high-low or low-high configuration).

supercat
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