Beyond what is recommended by fabricators, how far should traces be from SMD pads?

Question

Having followed a fabricator's DRC (this case being OSHPark), this distance between an SMD pad and a trace is considered acceptable (see attached images).

However, I wanted to inquire about what the accepted logic is behind the distances between traces and SMD pads, with and beyond manufacturing restrictions? My initial thought jumped to how exactly the SMD components are soldered, but am unsure what considerations to make in practice as I will be hand soldering them.

These examples are of SOT-23 transistor and a 0603 resistor respectively.

Example 1:

Example 2:

I've read through this question, which I think has pertinence.

Answer 1

In many situations, the manufacturing limits are the important limits that will guide your design.

Some common situations where you might need to consider other limits:

• If your circuit carries voltages above 50 V, you may need to consider creepage and clearance distances for safety isolation.

• If your circuit carries frequencies above about 500 MHz (more to the point, if your circuit size is more than 1/20 of the wavelength related to your signal frequency) you may need to consider controlled impedance or other distributed circuit effects.

• If your circuit includes sensitive high-impedance nodes in an analog circuit, you might need to consider leakage currents.

Answer 2

There are really three levels of concern: Manufacturing (the blank PCBs), assembly (soldering components onto the board), and electrical (everything actually works as intended!).

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1. Manufacturing

   As long as you stay within the board house's constraints, they guarantee that the board can be made as you designed it. There are actually quite a few more constraints than OSHPark mentions on its website, but the ones listed are sufficient unless you are doing something with more stringent requirements.

   For example, here is the capabilities document from Advanced Circuits. Notice there are specs for everything(!), but you won't care about most of them :)

   Personally, I try not to push the limits of the board house unless I have to. OSHPark will give you 6-mil trace/space on a 2-layer board, but I'd use 10-mil or greater unless you're running out of space.

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2. Assembly

   If you use standard packages and footprints, you usually won't have to worry about solderability. The footprints will have soldermask which will help control the solder and minimize solder bridges.

   Once you dig into it, surface-mount footprints have a concept called "density", which is defined by IPC-7351 as "most", "nominal", and "least". These terms refer to how much copper is exposed for a given pad. If you need a really tight design, the pads shrink down and you can cram the parts closer. If you don't have space constraints, the pads can be bigger. This helps hand-soldering and it makes rework easier. It's hard to hand-solder a "least" footprint!

   If your tool gives you the options, "most" is really nice for hand-soldering. Many tools don't give you the options, but instead default to something close to "nominal". This should be fine.

   There is a free program, PCB Library Expert, which will construct footprints for you which conform to IPC-7351. It allows you to select different density levels, and works with many PCB software packages. The website is here. The free version has advertisements.

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3. Electrical Integrity

   This is a huge subject which can't be covered in a single question (or a single textbook). I've been doing boards for years and I keep learning new stuff. I'll mention just a few things to get you started:

   The very first level of concern is simply current-carrying capability. Thicker traces carry more current :) If you Google "trace width calculator" you'll find numerous free resources. There are other reasons to use thicker traces such as minimizing trace inductance, but they won't matter in many circuits.

   Also, the space between traces needs to increase as the voltages increase. Google "pcb creepage and clearance".

   Another thing to consider is cross-talk. Electrical fields created in one trace can couple into neighboring traces. This effect increases as the traces get closer together, and as the signalling rates increase. A good rule of thumb is to have 3*w space between traces, where "w" is the trace width.

   Cross-talk can easily minimized by putting a ground plane under all the traces on a different layer. Especially if you have a 4-layer board, you can fill an entire inner layer with copper which will give many types of benefits.

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OK, that's enough! Good luck, and ask questions here as they come up :)

Answer 3

I never go under 10 mil (0.25mm) between TRACE and CLEARANCE, in other words, not between the trace and the copper area of the pad but with the edge of the solder resist. That means at least 12 or 13 (0.30 to 0.35mm) trace to copper but it depends how much clearance you add. This is for me an absolute minimum. Usually I try to have at least than 12 mil trace to clearance (or clearance to clearance).

IMO the distance between clearance and pad or another clearance is what matters because that's what provides electrical isolation and solder paste repulsion during soldering. 10 mil (0.25mm) is sort of a material limit 1/ for 100% fabrication accuracy guarantee aka tolerance (thought tolerance is in reality much smaller for PCBs) 2/ For the material solidity itself. Something too thin won't hold.

Another thing to consider beyond voltage and frequency (see other answers) is copper thickness. For every additional oz (or 35 µm) you have to add +-10 mil (0.25mm) and to the distance, and to the trace width. This is because the manufacturers are unable to reach high precision with thick copper.

These values must also apply corner to trace, not only parallel. Corners are the most dangerous shapes. Measure diagonals.

Answer 4

I use 10mil seperation for logic and low voltage/frequency analog signals. 15mil when I think to change it. Does your design tool have a clearance checker? Be sure to use it if it does.

In both your examples, the component looks like it could be moved some for better clearance. One to the right, and one to left.

I also don't see any indications of ground planes (on top & bottom layers), that can help tremendously with routing if you don't have to snake a ground trace all over the board. Use vias Named GND to connect the layers together and fill unused areas of the board.