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By looking at the Ebers-Moll equation for a BJT transistor:

enter image description here

Is this formula explicitly showing why Ic starting to decrease towards zero in saturation region. Which part of the equation shows that?

enter image description here

user1245
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    Read the wikipedia page: https://en.wikipedia.org/wiki/Bipolar_junction_transistor#Ebers%E2%80%93Moll_model there it states: *The DC emitter and collector currents* **in active mode** *are well modeled by an approximation to the Ebers–Moll model* so....? What is said about saturation mode? – Bimpelrekkie Jan 15 '19 at 14:22
  • Please see my edit. I plotted Vbe versus Ic. After some point for Vbe, the Ic starts decreasing. In that region does the Ebers Moll still hold or we should look at transistor as nothing but a point? Vbe is V(N003,N004) which is the axis on the plot. – user1245 Jan 15 '19 at 14:39
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    How can you be sure that the transistor you're using in your simulator **only** uses the E-M equation you listed above it? Typically different equations are used as the transistor enters saturation mode. The discontinuity at Vbe = 798mV sort of hints at this. – Bimpelrekkie Jan 15 '19 at 15:31
  • The full Ebers-Moll, level 1 (they wrote more, later on, so there is also a level 2 and a level 3 set of models) is disclosed [here](https://electronics.stackexchange.com/a/252199/38098) on this EESE site. Your equation isn't Ebers-Moll. It's just one equation of several within the *injection* version of it (itself, only one of the three forms of level 1.) And why isn't it obvious to you why the collector current can decline like that in your circuit. Add your base and emitter current curves, for example. – jonk Jan 15 '19 at 18:04

1 Answers1

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As has been pointed out, no part of Ebers-Moll will explain your effect. Ebers-Moll explicitly deals with linear operation, not saturation.

However.

You should note that, for voltages above 798 mV, the transistor is not in saturation.

For instance, at V = ~824 mV, current is 1 mA. This means that the voltage across R1 is only one volt, which means 4 volts across C-E and R2. Since the base voltage is 824 mV, the maximum possible voltage across R2 must be less than one volt, and there must be at least 3 volts across the transistor. With Vce greater than Vbe, the transistor is, by definition, not in saturation.

What is going on in the simulator model - I have no idea. But you've clearly found a mode where Something Is Wrong. I suggest you rerun your simulation with voltage and current meters on every node.

EDIT - This is a year and a half late, but the answer is actually quite simple, and I'm ashamed to have missed it.

Notice that the peak collector current is 2.4 mA. This produces 2.4 volts across R1, and even more across R2. Let's say 2.5 volts or so. This implies that the base voltage VB (NOT VBE!) has risen to about 3.3 volts, VCE is about 0.1 volts, and the transistor is fully saturated.

As VB is increased past this point, VC is also increased, since it can't go negative. This accounts for the decreasing current through R1. At VBE of 824 mV, the current through R1 falls to about 1 mA. With VCE stuck at about zero (call it 0.1 volt), the voltage across R2 will be about 4 volts, and with Ic at 1 mA, the base current must be about 3 mA. In other words, the transistor is displaying a gain of about 1/3!

This demonstrates why switching circuits normally have a small or no resistor from emitter to ground, although if there are multiple BJTs in parallel some resistance is needed to prevent current hogging and firecracker-mode failure. Increasing current raises the emitter voltage, making providing enough base current difficult. If the emitter were grounded, increasing VBE would provide a constantly-increasing Ic, although with constantly decreasing gain once the circuit gets anywhere close to saturation.

WhatRoughBeast
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