In my digital design module involving HDL (Verilog) and a ton of RTL diagrams, our lecturer always said never to use demultiplexers because they do not exist.
Why is that?
In my digital design module involving HDL (Verilog) and a ton of RTL diagrams, our lecturer always said never to use demultiplexers because they do not exist.
Why is that?
Demultiplexers/decoders are commonly used in SSI/MSI logic because it's a convenient way to get an array of AND gates with various combinations of true and inverted inputs in a single package. (Example)
But that's really all they are. In FPGA design, each AND gate gets synthesized directly, sometimes combined with other functions into a single LUT. There's no particular reason to use a "demultiplexer" in the source code — it's more likely to obfuscate the design rather than making it clearer.