There are several mechanisms for power consumption at the chip level.
When circuits switch, there are internal parasitic capacitors in all transistors and interconnects (internally on the chips and externally). These capacitors have to be charged and discharged when the circuit nodes are switched from off to on (or on to off). The capacitors are tiny, but when you have billions of them switching billions of times per second it adds up. (this power is actually dissipated by circuit element resistance, including parasitic resistance in the parasitic capacitors)
All circuit elements also have resistance so current flow anywhere in the circuits creates heat and consumes power. As the circuit nodes switch, the parasitic capacitors on the load side devices have to be changed or discharged and this requires current flow which, in turn, creates heat and consumes power.
The power consumption associated with these two effects varies by the number of internal node switching operations which means the power consumption varies by the activity (and clock speed) of the processor and other elements.
Transistors and other components inside the integrated circuits also have leakage current. This creates a baseline (static) power consumption that still occurs when the processor is inactive. Many modern low power systems switch off the power to entire subsystems on the processor and other chips during sleep or inactive states to minimize this static power consumption.
There are other mechanisms of power consumption in computers (power supply quiescent power, etc) but these should help you understand why the power consumption varies and why there is still some power consumption when no work is being done.