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I am learning the PCI/PCIe bus. I learned that:

  • A PCI hierarchy can support at most 256 buses.
  • A PCI bus can support at most 32 devices.
  • A PCI device can have at most 8 functions.

I checked the Configuration Header Type 0.

enter image description here

There's a Device ID field which spans 2 bytes. 2^16 is much greater than 256.

So where do the 256, 32 and 8 restrictions come from?

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    The device ID is like the part number. It is used during enumeration to figure out what driver to load. It is not necessarily unique in a machine. For example, two NICs of the same model will have the same device ID. – alex.forencich Sep 01 '18 at 07:27
  • not an expert on this topic, but I'd expect PCIe to be pretty different from PCI with respect to this – in the end, PCIe is a switched bus with point-to-point links, and that's not comparable to what limits the number devices on a PCI bus. – Marcus Müller Sep 01 '18 at 07:40
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    @marcus surprisingly not that much. On the software side they are very similar, pcie was designed to work with basically a PCI driver – PlasmaHH Sep 01 '18 at 11:10
  • @PlasmaHH ah, true (which is why `lspci` is still useful on modern PCs). But, a PCIe switch can basically span up it's totally independent sub-tree, and I think the simple factual restrictions of PCI break down here, wouldn't they? – Marcus Müller Sep 01 '18 at 11:17
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    @marcus depends on how you address messages. Of you still have the 16 bit only, not all could talk to all others – PlasmaHH Sep 01 '18 at 11:49

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I found an answer:

In addition to the normal memory-mapped and I/O port spaces, each device function on the bus has a configuration space, which is 256 bytes long, addressable by knowing the eight-bit PCI bus, five-bit device, and three-bit function numbers for the device (commonly referred to as the BDF or B/D/F, as abbreviated from bus/device/function). This allows up to 256 buses, each with up to 32 devices, each supporting eight functions.

enter image description here

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