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While looking at SATA, PCIe, USB, SD UHS-II it struck me that they are all the same: digital serial bitstream, transmitted using differential pairs (usually 8b/10b coded), with some differences in link/protocol layers.
Why so? Why did this become the standard?
Why are there no widespread system communication protocols that heavily employ some advanced modulation methods for a better symbol rate? Am I missing something? This is not a question of "serial vs parallel" but a question of "digital signaling vs modulated analog"

T.J.L.
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artemonster
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    Well, what alternatives are there? – PlasmaHH Aug 30 '18 at 08:33
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    Well, there used to be parallel, but you'd need a lot of copper and very wide cables. – Jeroen3 Aug 30 '18 at 08:53
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    And that's of course how DDR still works today. – MSalters Aug 30 '18 at 10:14
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    Because it works. – Hot Licks Aug 30 '18 at 11:55
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    And serial overtook parallel for printer cables, et al, when electronics got so cheap that the serial-parallel converter was cheaper than the wire. – Hot Licks Aug 30 '18 at 11:57
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    This is a great question! I've been wondering this since I first heard of this "SATA thing" a decade or so ago (after having been out of the IT loop for a number of years), and had just never bothered asking. – FreeMan Aug 30 '18 at 13:12
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    Why don't you suggest "some advanced modulation methods", so we can understand what do you mean and compare with "serial bit streams"? – Ale..chenski Aug 31 '18 at 06:47
  • @AliChen Why transmit directly 1s and 0s, instead of opting in for some (for example) AM scheme? – artemonster Aug 31 '18 at 09:12
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    It takes longer to measure voltage more precisely. If you start introducing more voltage levels than 1 and 0, your frequency will go down, and you will have no net gain in bandwidth (possibly a loss). – Aaron Aug 31 '18 at 14:52
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    @PlasmaHH before SATA people used IDE, which is a parallel port. PCIe succeeds PCI, which is parallel. And before the advent of USB the fastest external port is the parallel port, therefore it's often used for printers and scanners – phuclv Sep 01 '18 at 08:43
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    @phuclv it's kinda implied that this is for now, not for 20 years ago. Or are you still using ide and parallel ports widely? – PlasmaHH Sep 01 '18 at 11:01

8 Answers8

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There are two main reasons for the rise of serial

1) It's possible. Low cost transistors have been able to manage GHz switching for a decade now, long enough for the capability to be used and become standard.

2) It's necessary. If you want to shift very high speed data more than a few inches. This distance starts to rule out mobo to PCI card links, and definitely rules out mobo to hard disk, or mobo/settopbox to display connections.

The reason for this is skew. If you transmit several parallel signals along a cable, then they have to arrive within a small fraction of the same clock period. This keeps the clock rate down, so the cable width has to increase. As data rates climb, that becomes more and more unweildy. The prospect for increasing the rate into the future is non-existent, double or quadruple width ATA anybody?

The way to slay the skew demon is to go serial. One line is always synchronised with itself, there is nothing for it to be skewed with. The line carries data that is self-clocked. That is, uses a data coding scheme (often 8b/10b, sometimes much higher) that provides a minimum guaranteed transition density which allows clock extraction.

The prospect for increasing data rate or distance into the future is excellent. Each generation brings faster transistors, and more experience crafting the mediium. We saw how that played out with SATA, which started at 1.5Gb/s, then moved through 3 and is now 6Gb/s. Even cheap cables can provide sufficiently consistent impedance and reasonable loss, and equalisers are built into the interface silicon to handle frequency dependent loss. Optical fibre is available for very long runs.

For higher data rates, several serial links can be operated in parallel. This is not the same as putting conductors in parallel, which have to be matched in time to less than a clock cycle. These serial lanes have only need to be matched to within a high level data frame, which can be µs or even ms long.

Of course the advantage in data width doesn't just apply to the cables and connectors. Serial also benefits PCB board area between connectors and chip, chip pinout, and chip silicon area.

I do have a personal angle on this. As a designer working on software defined radio (SDR) from the 90's onwards, I used to rail at people like Analog Devices and Xilinx (and all the other ADC and FPGA companies) (they would visit and ask us from time to time) for making me run so many parallel differential connections between multi-100MHz ADCs and FPGAs, when we were just starting to see SATA emerge to displace ATA. We finally got JESD204x, so now we can hook up converters and FPGAs with only a few serial lines.

Community
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Neil_UK
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    PCI express 3 and 4 use 128b/130b encoding. – Peter Smith Aug 30 '18 at 09:51
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    What is the `Nb/(N+2)b` nomenclature people are using here? – detly Aug 30 '18 at 10:50
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    @detly I think those are payload (N bits) and entity (N+2 bits) size. The entity is a payload prefixed by a preamble. – Mast Aug 30 '18 at 11:55
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    @detly the [8b/10b](https://en.wikipedia.org/wiki/8b/10b_encoding), 64b/66b are both forms of [Line-Code](https://en.wikipedia.org/wiki/Line_code) encoding. In serial comms context, the line-encoding is needed to ensure you can do Clock-Recovery](https://en.wikipedia.org/wiki/Clock_recovery). – Trevor Boyd Smith Aug 30 '18 at 12:31
  • It might be worth mentioning some relevant metrics to give more detail to your 3rd paragraph. Signals will propagate slightly slower than the speed of light ~ 11.8 in/ns. At 1 GHz, that't not so bad, but at 6GHz that means you have roughly 3 inches before your signals arrive at different times. – Ben Burns Aug 30 '18 at 14:32
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    @tolos - the velocity factor for most flavours of *ordinary* PCB materials is about 50% (6 in / ns). – Peter Smith Aug 30 '18 at 14:40
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    For streaming things like video, would there be any particular impediment to having multiple parallel connections, each with its own internal clocking, one of which is specified to be transmitted slightly behind the others? A receiver would be expected to receive and store data from all the other wires, and then act upon it once the data was received from the wire that was delayed. That would seem like it could allow for a generous amount of skew, while adding minimal delay, and would allow bandwidth to be increased arbitrarily by adding more wires. – supercat Aug 30 '18 at 15:34
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    @supercat that's exactly how multiple lanes are handled, each lane has its own independent clocking. Data is framed and spread across all lanes. When the receiver has all the frames, it acts on the data. This allows skew related to the length of the data frame, which can be us or even ms as I said in my answer. This is the meaning of the number of lanes in PCIe, and how 2xHDMI are handled to a high performance display. – Neil_UK Aug 30 '18 at 16:20
  • @Neil_UK: HDMI has a clock wire along with a lane for each of RGB, though I must confess I'm uncertain as to what the purpose of the clock wire would be if the channels could be skewed by more than a bit time. Does 2xHDMI have different specs for skew between the two sets of RGB wires than between the wires in each RGB group? – supercat Aug 30 '18 at 16:24
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    @supercat The clock wire is for the I2C display data channel, video/audio is handled by differential serial – Neil_UK Aug 30 '18 at 16:34
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    Isn't another benefit of serial less transceivers\pins\wires and silicon area? I'd add that to the answer – Voltage Spike Aug 30 '18 at 20:23
  • @laptop2d yes, it's worth a short paragraph, thx. – Neil_UK Aug 31 '18 at 06:12
  • @PeterSmith: fibre channel (although rarely done on copper) uses 256/257 coding even – PlasmaHH Aug 31 '18 at 06:47
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    thanks for a detailed answer, but the question was not "why its serial and not parallel", but "why is it digital and not modulated?" still a great answer :) – artemonster Aug 31 '18 at 09:11
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    @artemonster yes, completely missed that precise question, perhaps because the answer is so obvious. In a wired environment, baseband binary digital is used because it can be, because it's so simple. They've made smarter use of the medium going from 33MHz TTL to 6GHz LVDS, I'd call that 'advanced'. In a non wired environment, then you have to modulate. That's gone from AM through FM and QAM to OFDM, but it needs a huge amount of smarts to pick the data out of the link, whereas digital only needs a comparator. – Neil_UK Aug 31 '18 at 10:30
  • somehow I got impression that it is "simpler" to use lower frequencies and heavily modulated signal to achieve same throughput vs pushing signal frequency into upper GHz and dealing with all the issues that arise with that, because digital phy is not "only a comparator" anymore. – artemonster Aug 31 '18 at 11:23
  • @artemonster I think that the key thing (there are several key things) is that a binary comparator is simpler, lower power, lower error rate etc, than a multi-level one, as is a binary transmitter. I notice Ali Chen's answer references 1G ethernet, which may be a bit unusual as it is trying to cram throughput into an existing electrical specification, hence the use of multilevel. As ever, most of it comes down to cost. It might be interesting to do a detailed design of a modulated transmission system with the same throughput as 8 lane PCIe, or a 6G SATA, and see what the power comparison was. – Neil_UK Aug 31 '18 at 11:43
  • @Neil_UK: Descriptions I'd read of HDMI indicated that it used a differential pair to send a square wave clock signal whose half-period was 1/10 the data rate, with the expectation that receivers would use a PLL to scale it up tenfold. Was that essentially abandoned for the second RGB group, or is the idea to use a clock edge that should occur in the middle of each pixel's data to latch the output from the previous pixel on each channel (all of which should have arrived if they're skewed by 4 bits or less). – supercat Aug 31 '18 at 14:46
  • If each channel fed a receive circuit that latched 8 parallel bits after each byte was complete on its pipe, and one of them had a circuit which generated an output in the middle of each byte, having the next circuit clock all groups of 8 bits into a FIFO would be a reliable way of getting synchronized bytes from all channels with or without a separate clock. I wonder what the purpose of the clock signal was [or, for that matter, why switching to HDMI inputs is so much slower than switching to analog ones]. – supercat Aug 31 '18 at 14:54
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Why there are no widespread system communication protocols that heavily employ some advanced modulation methods for a better symbol rate?

If the basic copper connection between two points supports a digital bit rate that is in excess of the data rate needed to be transmitted by the "application", then why bother with anything else other than standard differential high-speed signalling?

Employing an advanced modulation scheme is usually done when the "channel" has a bandwidth that is much more limited than copper or fibre.

Andy aka
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If you want an example of something that is widely used, but different, look at 1000BASE-T gigabit Ethernet. That uses parallel cables and non-trivial signal encoding.

Mostly, people use serial buses because they are simple. Parallel buses use more cable, and suffer from signal skew at high data rates over long cables.

Simon B
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    GbE was created by throwing money at the problem of pushing more data over the vast amounts of existing Cat 5 wiring. It probably wouldn't quite look like it does if a new interface was designed with no concern over backwards compatibility. Cf how 10GbE is not making any serious inroads in commercial / domestic settings as it requires installing new Cat 6a cabling. – Barleyman Aug 30 '18 at 11:02
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    10GbE might still work on cat5e or cat5 depending on cable length and/or quality. – user3549596 Sep 03 '18 at 11:11
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To add to the other fine answers:

The issues noted in other answers (most notably, skew between parallel signals, and the costs of extra wires in the cable) increase as the distances of the signals increase. Thus, there is a distance at which serial becomes superior to parallel, and that distance has been decreasing as data rates have increased.

Parallel data transfer still happens: inside of chips, and also most signals within circuit boards. However, the distances needed by external peripherals -- and even by internal drives -- are now too far and too fast for parallel interfaces to remain practical. Thus, the signals that an end-user will now be exposed to are largely serial.

DrSheldon
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    Probably best example of high speed parallel signaling is RAM memory, especially in PCs. – jaskij Aug 30 '18 at 23:16
  • Excellent answer, points directly to the root issue of time synchronziation across spatial domains. One thing to note, you can still have more than 2 symbols on a serial link, thus getting some benefit of parallel communications by using modulation to encode more bits per baud – crasic Aug 31 '18 at 07:32
  • @JanDorniak, it is worth noting that DDR* memory has data strobe bits used for synchronization. This enables a wide bus to be broken down into multiple smaller buses. It is easier to route multiple 8-bit parallel buses than it is to route a single 32-bit bus. – Caleb Reister Sep 10 '18 at 21:37
  • @CalebReister didn't know that. Still it's parallel. I personally had a situation where a modern PC would work or not depending on which slot the DDR4 was inserted. It ended up as UEFI forcing lower latency then the memory was capable of. – jaskij Sep 10 '18 at 21:49
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Advanced modulation techniques would require you to transmit and receive analog signals. ADCs and DACs running at hundreds of MHz tend to be expensive and consume quite a bit of power. Signal processing required for decoding is also costly in terms of silicon and power.

It's simply cheaper to make a better communication medium which can support binary signals.

Dmitry Grigoryev
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Why did the serial bit stream become so common?

Using serial links has the advantage that it reduced the physical size of the connection. Modern integrated circuit architectures have so many pins on them that this created a strong need to minimize the physical interconnection demands on their design. This led to developing circuits that operate at extreme speeds at the interfaces of these circuits using serial protocols. For the same reason, it's natural to minimize the physical interconnection demands elsewhere in any other data link.

The original demand for this kind of technology may have its origins in fiber optic data transmission designs, as well.

Once the technology to support high speed links became very common, it was only natural to apply it in many other places, because the physical size of serial connections is so much smaller than parallel connections.

Why are there no widespread system communication protocols that heavily employ some advanced modulation methods for a better symbol rate?

At the encoding level, coding schemes for digital communication can be as simple as NRZ (Non-Return to Zero), a slightly more complicated Line Code (e.g. 8B/10B), or much more complicated, like QAM (Quadrature Amplitude Modulation).

Complexity adds cost, but choices are also dependent on factors that ultimately rely on information theory and the capacity limits of a link. Shannon's Law, from the Shannon-Hartley Theorem describes the maximum capacity of a channel (think of that as "the connection" or "link"):

Maximum Capacity in Bits/Second = Bandwidth * Log2(1 + Signal/Noise)

For radio links (something like LTE or WiFi), bandwidth is going to be limited, often by legal regulations. In those cases QAM and similarly complex protocols may be used to eke out the highest data rate possible. In these cases, the signal to noise ratio is often fairly low (10 to 100, or, in decibels 10 to 20 dB). It can only go so high before an upper limit is reached under the given bandwidth and signal to noise ratio.

For a wire link, the bandwidth is not regulated by anything but the practicality of implementation. Wire links can have a very high signal to noise ratio, greater than 1000 (30 dB). As mentioned in other answers, bandwidth is limited by the design of the transistors driving the wire and receiving the signal, and in the design of the wire itself (a transmission line).

When bandwidth becomes a limiting factor but signal to noise ratio is not, the designer find other ways to increase data rate. It becomes an economic decision whether to go to a more complex encoding scheme or go to more wire:

You will indeed see serial/parallel protocols used when a single wire is still too slow. PCI-Express does this to overcome the bandwidth limitations of the hardware by using multiple lanes.

In fiber transmissions, they don't have to add more fibers (although they might use others if they are already in place and not being used). The can use wave division multiplexing. Generally, this is done to provide multiple independent parallel channels, and the skew issue mentioned in other answers is not a concern for independent channels.

Jim
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    Nice answer. It does make me curious if somebody could (or already has?) do something like implement 256-QAM at USB3 speeds for truly amazing transfer rates... – mbrig Aug 30 '18 at 20:04
  • FWIW, the fiber world is starting to develop and deploy more complex modulation schemes. PAM-4 is coming for 100 and 400 G Ethernet, and telecoms systems are (I believe, but it's not my field) starting to use coherent QAM. – The Photon Aug 31 '18 at 04:28
  • but, really, if the SNR of a wire line is so good, why not squeeze out every possible piece of bandwidth? Why push into GHZ frequencies (with all relevant problems), where you could go much slower and employ some modulation/coding. Wouldn't it be more convenient? – artemonster Aug 31 '18 at 09:21
  • You can do that. It becomes an economic decision. – Jim Aug 31 '18 at 14:50
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    QAM requires a carrier, so it doesn't make much sense to do anything other than PAM for 'baseband' digital. It is used in the optical domain, using light itself as the carrier. Over copper, you would basically just build a radio transceiver. This would require much more high speed analog circuitry, and all of the complexity and increased power consumption that comes with that. Serializers and deserializers are relatively simple in comparison. IMHO, we're more likely to see integrated silicon photonic modulators and detectors than moving to QAM over copper. – alex.forencich Sep 01 '18 at 21:32
  • Also, for fiber, they most certainly do use parallel fiber. Anything multimode at this point doesn't do WDM. So 100G LR4 is 4 25 Gbps links at 850 nm over 8 multimode fibers. There is also a PSM4 standard, which is 4 lanes of 25 Gbps at 1310 nm over 8 single-mode fibers. CWDM transceivers in the 1310 nm band exist, but they tend to be far more expensive than multimode transceivers. Long range stuff does use WDM, but in that case they'll pay a huge premium on the transceivers for bandwidth efficiency. – alex.forencich Sep 01 '18 at 21:37
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Take four semi trucks with a payload. Four lane per side highway. For the trucks to successfully haul the payload parallel they have to be perfectly side by side, one can not be ahead or behind the others by more than an inch lets say. Hills, curves, doesnt matter. Vary too much and its a total fail.

But have them take one lane and the distance between them can vary. While true that linearly it takes over four times the distance from front of the first truck to the back of the last to move the payloads, but they dont have to be perfectly spaced. Just within the length of one truck it has to have the cab and payload and length of payload to be properly positioned and spaced.

They even go so far as to be parallel, pcie, network, etc, but while those are technically multiple separate data paths, they are not parallel in that they have to leave and arrive at the same time, using the truck analogy the four trucks can drive on four lanes roughly parallel but can vary, the trucks are marked by what lane they arrived in so that when they arrive at the other end the payloads can be combined back into the original data set. And/or each lane can be one data set serially and by having more lanes you can move more data sets at one time.

old_timer
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As an addition to Dmitry Grigoryevs comment.

Analog transmission is allways more error-prone than digital transmission. A digital serial transmission for example has clocked flanks, where an analog signal is somehow floating between 0V and VDD. So interferences are way harder to detect. One could take that into account and use differential signaling, as done in Audio.

But then you run into that speed vs. accuracy tradeof of DACs/ADCs. If you have to digital systems talking to each other it makes way more sense to use a digital transmission, since you don't need some time consuming DA-AD translation.

However if you have an analogue computer running on analogue control voltages, there are still some around, they look like analogue modular synths basically, things are different, and typically you can build analogue computers only for specific tasks. Funny presentation in German about analogue computing.

Talking about analogue modular synths, they're also some kind of analogue computers, especially designed to do callculations on changing signals.

So there is analogue transmission in computing, but limited to very specific fields.

Tillo Reilly
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