How to amplify a low Amplitude, High frequency signal from Ultrasonic Transducer?

Question

I am working with some ultrasonic transducers, the receiver gets a signal of around 10 mVp-p at 125 kHz and for its purpose needs a gain of around 10.

So far have a simple inverting OP-Amp setup, however, unable to get a gain at all(Gains are achieved using a signal generator setup, with the same circuit,rather than an actual transducer as the input). I am thus led to believe it is something to do with the input impedance, i.e that of the transducer itself.

Moderate success using a unity gain buffer first, which could then be amplified? As the input impedance to the second op-amp would be easier to deal with.

I am wondering what sort of setup is required for this application? I've seen some posts about using multiple op-amps, but for this application, I want to keep the power consumption as low as possible. Powered using a 3 double A batteries, with a normal operating mode less than 30 uA. For test mode up to around 600 uA.

Thanks for reading.

Answer 1

You need an amplifier that has a high enough gain-bandwidth product, definitely above a few MHz, preferably 10-20MHz for a reasonably stable gain, assuming a sine wave at 125kHz. If your signal has a lot of higher harmonics, then higher. Using too high performance an amplifier will incur a power penalty without giving you much benefit.

The slew rate is not too important, given your low 100mV output, but in any case it needs to be higher than \$2\pi f V\$ so about 0.1V/\$\mu\$sec.

Multiple amplifiers are often used to get high gain at wide bandwidth, since you can get a gain of 1000 with two or three amplifiers of gain 31.6 or 10 rather than trying to find an amplifier with a gain-bandwidth product in the GHz range, which will surely run quite hot and will probably be tetchy and oscillate if you look at it crosswise.

If you are really looking for micropower you may do better with a discrete transistor design than with a general purpose op-amp.

Answer 2

Consider this

^{simulate this circuit – Schematic created using CircuitLab}

You might replace the first transistor with a NJFET. The circuit may, with its auto-biasing, tolerate that major substitution.

Possible Gain Error: gain will be Rcollector / (Remitter + 1/gm of Q2) At 1mA Ic (or Ie) of Q2, the gm (transconductance) is 1/26 ohms. At 50uA IC, the gm is 1/(50 * 26) = 1/1300ohms, which is a LARGE gain error. Please reduce the Re from 5.1Kohm to 3.9 (or 3.8) Kohms.

Notice the use of Q3 as Cascode device, to minimize the Cmiller Effect. The Cob, or C_collector_base, is a wasteful parasitic, consuming the input signal energy.

Here is another topology, with feedback loop for precise gain

^{simulate this circuit}

For low power, scale up the resistors by 1,000X. There will be large Cmiller input capacitance. This provides gain Av = 11 (not 10).

With the lack of adaptive-biasing, this circuit is picky about input/base voltage. I've used superBeta transistors, to implement high DC Zin.