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I am modeling an analog device using verilog-a (to which I am quite new). I would like the model to match the power consumption of the physical device, for which the energy cost associated with state transitions has been measured.

What is the usually preferred way of achieving this? As this device is voltage-controlled, I could add some contribution rules to the current that roughly follow the measured power, although that would be complicated to implement. I also saw that I could add charge contribution directly, which would be easier to do given my data.

I do not need extremely high precision, especially when it comes to transient simulations: a rough estimate of electric power consumption over the whole simulation time should be enough.

These points are of particular interest to me:

  • What way (if any) is it usually done?
  • Do discontinuities in current or charge contribution (ex: Q(vin) <+ 1e3;) risk to cause convergence or stability problems for the simulator?
  • Is it a lot more costly to compute this? (Will it negatively impact my simulation time?)
stevesliva
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MayeulC
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  • Some of your questions appear to be in regard to a specific simulator rather than the HDL. Can you tell us which simulator you plan to use? – Elliot Alderson Jul 19 '18 at 11:39
  • I am planning to use Cadence's spectre simulator, though that should not be relevant. I might toy with [ADMS](http://ngspice.sourceforge.net/adms.html) as well. – MayeulC Jul 19 '18 at 12:19

2 Answers2

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Let me list some ways to model power consumption of a circuit:

  • A resistor between Vdd and GND

  • A constant current source between Vdd and GND (this can cause an issue when Vdd is off, for example the regulator supplying Vdd is off, then the current source might generate -1 kV for example to make the current flow).

  • A controlled current source which will only have a current > 0 when the enable input is high and Vdd > 1.8 V (just an example).

  • A controlled current source which has some complex formula/function to control it for example, it draws a defined pulse of current at every transition of a certain signal

Do discontinuities ...cause convergence or stability problems for the simulator?

They do not have to but they can, personally if I can avoid using a discontinuous functions then I will. But it depends on how often the discontinuity will occur, for an enable signal that switches on/off once per simulation I care less than for the switch in a DCDC converter which is switching continuously.

Is it a lot more costly to compute this?

Of course it will cost more as you add more. Keep it as simple as possible to keep the computing costs low. Only include that what you need.

Bimpelrekkie
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This paper might help you : An Accurate Estimation of Power Using Verilog

m68k
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  • Thanks. The paper is quite vague, though, and it seems to me that electric power consumption is derived from the results, as a post processing step, not computed by the electrical simulator. That's not exactly what I am looking for, but could be an idea worth exploring. – MayeulC Jul 19 '18 at 12:34
  • I see what you mean. The answer of Bimpelrekkie is more relevant I think ! – m68k Jul 19 '18 at 12:39