I am analysing some requirements regarding the sampling to be performed on a UART.
There is information provided however I am slightly confused by it and would like some clarification:
"The UART Receiver will sample at least 16 times faster than the fundamental transmission frequency of the UART. E.g for a 2 Mbit/sec bit-rate, the fundamental frequency is 1 MHz, requiring a sampling rate of 16 MHz min. The UART clock will therefore cycle at least eight times within one transmitted bit period."
I understood that 16x Oversampling meant 16 samples per bit (not necessarily all captured depending on the RXR bit validation criteria), not 8.
I understood that a 2 Mbps rate would be a fundamental frequency of 2 MHz, requiring a 32 MHz clock to perform the oversampling (this would therefore require a 1 Mbps rate to O-sample using a 16 MHz clock).
Is the example wrong or am I missing something fundamental here?