How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data?

Question

How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data? Are instruction fetches done always using NONSEQ? How does it fetch data from memory(using burst or NONSEQ transfers) ?

score 1 · Answer 1 · answered Apr 06 '18 at 11:52

1

From the ARM M0+ manual, revision r0p1:

AHB-Lite interface
Transactions on the AHB-Lite interface are always marked as non-sequential.

answered Apr 06 '18 at 11:52

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How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data?

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